summaryrefslogtreecommitdiffstats
path: root/src/freedreno/ir3
diff options
context:
space:
mode:
authorEric Anholt <[email protected]>2020-02-05 14:43:35 -0800
committerMarge Bot <[email protected]>2020-02-24 18:25:02 +0000
commit1b7de2d6b857cd4f3dd45bbcdf135f70548b1935 (patch)
tree5c21629f5d3414426967e48b1dba8d0540f5bfa3 /src/freedreno/ir3
parentd37c6ebd3ce8e20adb57001629f21ac09bee0679 (diff)
freedreno/ir3: Reuse glsl_get_sampler_dim_coordinate_components() in tex_info.
Now that we have access to the interior switch statement not going through the txs special case for coord_components, we can just use it. Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
Diffstat (limited to 'src/freedreno/ir3')
-rw-r--r--src/freedreno/ir3/ir3_compiler_nir.c24
1 files changed, 3 insertions, 21 deletions
diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c
index 00f914227dc..c6cddc0b9ca 100644
--- a/src/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/freedreno/ir3/ir3_compiler_nir.c
@@ -1893,33 +1893,15 @@ get_tex_dest_type(nir_tex_instr *tex)
static void
tex_info(nir_tex_instr *tex, unsigned *flagsp, unsigned *coordsp)
{
- unsigned coords, flags = 0;
+ unsigned coords = glsl_get_sampler_dim_coordinate_components(tex->sampler_dim);
+ unsigned flags = 0;
/* note: would use tex->coord_components.. except txs.. also,
* since array index goes after shadow ref, we don't want to
* count it:
*/
- switch (tex->sampler_dim) {
- case GLSL_SAMPLER_DIM_1D:
- case GLSL_SAMPLER_DIM_BUF:
- coords = 1;
- break;
- case GLSL_SAMPLER_DIM_2D:
- case GLSL_SAMPLER_DIM_RECT:
- case GLSL_SAMPLER_DIM_EXTERNAL:
- case GLSL_SAMPLER_DIM_MS:
- case GLSL_SAMPLER_DIM_SUBPASS:
- case GLSL_SAMPLER_DIM_SUBPASS_MS:
- coords = 2;
- break;
- case GLSL_SAMPLER_DIM_3D:
- case GLSL_SAMPLER_DIM_CUBE:
- coords = 3;
+ if (coords == 3)
flags |= IR3_INSTR_3D;
- break;
- default:
- unreachable("bad sampler_dim");
- }
if (tex->is_shadow && tex->op != nir_texop_lod)
flags |= IR3_INSTR_S;