aboutsummaryrefslogtreecommitdiffstats
path: root/src/freedreno/ir3/ir3_compiler_nir.c
diff options
context:
space:
mode:
authorEric Anholt <[email protected]>2020-05-11 11:18:02 -0700
committerMarge Bot <[email protected]>2020-05-12 17:01:55 +0000
commitf789c5975c83f12216cf915d9a791e654b3c9e15 (patch)
treec6810f2b0c6b9fa2e83cf57e5731162b0cbff618 /src/freedreno/ir3/ir3_compiler_nir.c
parent4553fc66a5f23607c2e872d8ac8755c747bd0bd2 (diff)
freedreno: Fix non-constbuf-upload UBO block indices and count.
The nir_analyze_ubo_ranges pass removes all UBO block 0 loads to reverse what nir_lower_uniforms_to_ubo() had done, and we only upload UBO pointers to the HW for UBO block 1-N, so let's just fix up the shader state. Fixes an off by one in const state layout setup, and some really dodgy register addressing trying to deal with dynamic UBO indices when the UBO pointers happen to be at the start of the constbuf. There's no fixes tag, though this fixes a bug from September, because it would require the num_ubos fix in nir_lower_uniforms_to_ubo. Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4992>
Diffstat (limited to 'src/freedreno/ir3/ir3_compiler_nir.c')
-rw-r--r--src/freedreno/ir3/ir3_compiler_nir.c5
1 files changed, 1 insertions, 4 deletions
diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c
index d40978f574b..dc2492e242a 100644
--- a/src/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/freedreno/ir3/ir3_compiler_nir.c
@@ -760,11 +760,8 @@ emit_intrinsic_load_ubo(struct ir3_context *ctx, nir_intrinsic_instr *intr,
{
struct ir3_block *b = ctx->block;
struct ir3_instruction *base_lo, *base_hi, *addr, *src0, *src1;
- /* UBO addresses are the first driver params, but subtract 2 here to
- * account for nir_lower_uniforms_to_ubo rebasing the UBOs such that UBO 0
- * is the uniforms: */
struct ir3_const_state *const_state = &ctx->so->shader->const_state;
- unsigned ubo = regid(const_state->offsets.ubo, 0) - 2;
+ unsigned ubo = regid(const_state->offsets.ubo, 0);
const unsigned ptrsz = ir3_pointer_size(ctx->compiler);
int off = 0;