diff options
| author | Rob Clark <[email protected]> | 2019-02-20 10:21:18 -0500 |
|---|---|---|
| committer | Rob Clark <[email protected]> | 2019-02-20 18:50:08 -0500 |
| commit | c543a2cf6f4ab86b78ef314f4be22d6dd2e4604a (patch) | |
| tree | 3c438f23f5e199bdac811660bddb15c28c8025b8 /src/freedreno/ir3/ir3.h | |
| parent | cadf6def0cc9770c6d0d9e0e15db6e14d3763684 (diff) | |
freedreno/ir3: sync instr/disasm and add ldib encoding
Resync disasm and instr header from envytools, and add ldib encoding.
This replaces an opcode from a3xx which was never seen in practice,
since that seemed easier than dealing with the same opc # meaning a
different thing on a6xx. (Not really sure if 'sti' was actually a
real thing, I think it was only seen in fuzzing.)
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/freedreno/ir3/ir3.h')
| -rw-r--r-- | src/freedreno/ir3/ir3.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/freedreno/ir3/ir3.h b/src/freedreno/ir3/ir3.h index 918fce833f2..36d645f0b50 100644 --- a/src/freedreno/ir3/ir3.h +++ b/src/freedreno/ir3/ir3.h @@ -688,6 +688,7 @@ static inline bool is_load(struct ir3_instruction *instr) switch (instr->opc) { case OPC_LDG: case OPC_LDGB: + case OPC_LDIB: case OPC_LDL: case OPC_LDP: case OPC_L2G: @@ -1360,6 +1361,7 @@ INSTR2(ATOMIC_OR) INSTR2(ATOMIC_XOR) #if GPU >= 600 INSTR3(STIB); +INSTR2(LDIB); INSTR3F(G, ATOMIC_ADD) INSTR3F(G, ATOMIC_SUB) INSTR3F(G, ATOMIC_XCHG) |