diff options
author | Connor Abbott <[email protected]> | 2020-03-06 18:06:06 +0100 |
---|---|---|
committer | Marge Bot <[email protected]> | 2020-04-09 15:56:55 +0000 |
commit | c8b0f904398cdc30ffc67c162bc3f570bf887ed9 (patch) | |
tree | 5ac775ac19befdd1f6f77a67fa88bc3dbc1c5911 /src/freedreno/ir3/ir3.c | |
parent | 122a900d7de826dcd1056f2ad2ea4c72d9129c06 (diff) |
ir3: Add bindless instruction encoding
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4358>
Diffstat (limited to 'src/freedreno/ir3/ir3.c')
-rw-r--r-- | src/freedreno/ir3/ir3.c | 45 |
1 files changed, 23 insertions, 22 deletions
diff --git a/src/freedreno/ir3/ir3.c b/src/freedreno/ir3/ir3.c index 4ac50aec0a3..7bdf8a39ba8 100644 --- a/src/freedreno/ir3/ir3.c +++ b/src/freedreno/ir3/ir3.c @@ -482,20 +482,23 @@ static int emit_cat5(struct ir3_instruction *instr, void *ptr, cat5->src1 = reg(src1, info, instr->repeat, IR3_REG_HALF); } + if (src2) { + iassert(!((src1->flags ^ src2->flags) & IR3_REG_HALF)); + cat5->src2 = reg(src2, info, instr->repeat, IR3_REG_HALF); + } + if (instr->flags & IR3_INSTR_S2EN) { struct ir3_register *samp_tex = instr->regs[1]; - if (src2) { - iassert(!((src1->flags ^ src2->flags) & IR3_REG_HALF)); - cat5->s2en.src2 = reg(src2, info, instr->repeat, IR3_REG_HALF); - } iassert(samp_tex->flags & IR3_REG_HALF); - cat5->s2en.src3 = reg(samp_tex, info, instr->repeat, IR3_REG_HALF); + cat5->s2en_bindless.src3 = reg(samp_tex, info, instr->repeat, IR3_REG_HALF); + /* TODO: This should probably be CAT5_UNIFORM, at least on a6xx, as + * this is what the blob does and it is presumably faster, but first + * we should confirm it is actually nonuniform and figure out when the + * whole descriptor mode mechanism was introduced. + */ + cat5->s2en_bindless.desc_mode = CAT5_NONUNIFORM; iassert(!(instr->cat5.samp | instr->cat5.tex)); } else { - if (src2) { - iassert(!((src1->flags ^ src2->flags) & IR3_REG_HALF)); - cat5->norm.src2 = reg(src2, info, instr->repeat, IR3_REG_HALF); - } cat5->norm.samp = instr->cat5.samp; cat5->norm.tex = instr->cat5.tex; } @@ -506,7 +509,7 @@ static int emit_cat5(struct ir3_instruction *instr, void *ptr, cat5->is_3d = !!(instr->flags & IR3_INSTR_3D); cat5->is_a = !!(instr->flags & IR3_INSTR_A); cat5->is_s = !!(instr->flags & IR3_INSTR_S); - cat5->is_s2en = !!(instr->flags & IR3_INSTR_S2EN); + cat5->is_s2en_bindless = !!(instr->flags & IR3_INSTR_S2EN); cat5->is_o = !!(instr->flags & IR3_INSTR_O); cat5->is_p = !!(instr->flags & IR3_INSTR_P); cat5->opc = instr->opc; @@ -564,31 +567,29 @@ static int emit_cat6_a6xx(struct ir3_instruction *instr, void *ptr, case OPC_ATOMIC_OR: case OPC_ATOMIC_XOR: cat6->pad1 = 0x1; - cat6->pad2 = 0xc; - cat6->pad3 = 0x0; - cat6->pad4 = 0x3; + cat6->pad3 = 0xc; + cat6->pad5 = 0x3; break; case OPC_STIB: cat6->pad1 = 0x0; - cat6->pad2 = 0xc; - cat6->pad3 = 0x0; - cat6->pad4 = 0x2; + cat6->pad3 = 0xc; + cat6->pad5 = 0x2; break; case OPC_LDIB: cat6->pad1 = 0x1; - cat6->pad2 = 0xc; - cat6->pad3 = 0x0; - cat6->pad4 = 0x2; + cat6->pad3 = 0xc; + cat6->pad5 = 0x2; break; case OPC_LDC: cat6->pad1 = 0x0; - cat6->pad2 = 0x8; - cat6->pad3 = 0x0; - cat6->pad4 = 0x2; + cat6->pad3 = 0x8; + cat6->pad5 = 0x2; break; default: iassert(0); } + cat6->pad2 = 0x0; + cat6->pad4 = 0x0; return 0; } |