i965/fs: Use the correct base_mrf for spilling pairs in SIMD8

Before, we were hard-coding the base_mrf based on dispatch width not number
of registers spilled at a time.  This caused us to emit instructions with a
base_mrf or 14 and a mlen of 3 so we used the magical non-existant m16
register.  This fixes the problem.

Signed-off-by: Jason Ekstrand <[email protected]>
Reviewed-by: Matt Turner <[email protected]>

0 files changed, 0 insertions, 0 deletions