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authorSagar Ghuge <[email protected]>2019-02-25 14:56:29 -0800
committerSagar Ghuge <[email protected]>2019-03-04 15:50:25 -0800
commit58bcebd987b7c4e7d741f42699d34b8189ab9e79 (patch)
tree54757f1f6361fd883b0ebc6d68d8f4669e9aff60 /src/compiler
parent47ec9bdc604cb91af5acdb8522972ede7872cf71 (diff)
spirv: Allow [i/u]mulExtended to use new nir opcode
Use new nir opcode nir_[i/u]mul_2x32_64 and extract lower and higher 32 bits as needed instead of emitting mul and mul_high. v2: Surround the switch case with curly braces (Jason Ekstrand) Signed-off-by: Sagar Ghuge <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/compiler')
-rw-r--r--src/compiler/spirv/vtn_alu.c16
1 files changed, 10 insertions, 6 deletions
diff --git a/src/compiler/spirv/vtn_alu.c b/src/compiler/spirv/vtn_alu.c
index f910630acfb..fa8f259a006 100644
--- a/src/compiler/spirv/vtn_alu.c
+++ b/src/compiler/spirv/vtn_alu.c
@@ -465,17 +465,21 @@ vtn_handle_alu(struct vtn_builder *b, SpvOp opcode,
val->ssa->elems[1]->def = nir_usub_borrow(&b->nb, src[0], src[1]);
break;
- case SpvOpUMulExtended:
+ case SpvOpUMulExtended: {
vtn_assert(glsl_type_is_struct(val->ssa->type));
- val->ssa->elems[0]->def = nir_imul(&b->nb, src[0], src[1]);
- val->ssa->elems[1]->def = nir_umul_high(&b->nb, src[0], src[1]);
+ nir_ssa_def *umul = nir_umul_2x32_64(&b->nb, src[0], src[1]);
+ val->ssa->elems[0]->def = nir_unpack_64_2x32_split_x(&b->nb, umul);
+ val->ssa->elems[1]->def = nir_unpack_64_2x32_split_y(&b->nb, umul);
break;
+ }
- case SpvOpSMulExtended:
+ case SpvOpSMulExtended: {
vtn_assert(glsl_type_is_struct(val->ssa->type));
- val->ssa->elems[0]->def = nir_imul(&b->nb, src[0], src[1]);
- val->ssa->elems[1]->def = nir_imul_high(&b->nb, src[0], src[1]);
+ nir_ssa_def *smul = nir_imul_2x32_64(&b->nb, src[0], src[1]);
+ val->ssa->elems[0]->def = nir_unpack_64_2x32_split_x(&b->nb, smul);
+ val->ssa->elems[1]->def = nir_unpack_64_2x32_split_y(&b->nb, smul);
break;
+ }
case SpvOpFwidth:
val->ssa->def = nir_fadd(&b->nb,