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authorEduardo Lima Mitev <[email protected]>2019-07-10 09:48:21 +0200
committerRob Clark <[email protected]>2019-10-18 21:11:54 +0000
commitf1d4fadf1bdc399be515fc21bea3c2832e802f3e (patch)
tree3c33c78257bbf3a55a873a7765816b05f19af666 /src/compiler/spirv
parent27df3e015bd1c0f74461b05a9f5b8c1a3fdf6ee5 (diff)
nir: Add new texop nir_texop_tex_prefetch
This is like nir_texop_tex, but signals that the sampling coordinates are immutable during the shader stage, in a way that allows the HW that supports pre-dispatching sampling operations to pre-fetch the result prior to scheduling the shader stage. This is introduced to support the feature in Freedreno. Adreno HW from a4xx supports it. A NIR pass introduced later in this series will detect sampling operations that are eligible for pre-dispatch, and replace nir_texop_tex by this new op, to tell the backend to enable pre-fetch. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]>
Diffstat (limited to 'src/compiler/spirv')
-rw-r--r--src/compiler/spirv/spirv_to_nir.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c
index 4fb2edae88d..14b76785561 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -2110,6 +2110,8 @@ vtn_handle_texture(struct vtn_builder *b, SpvOp opcode,
break;
case nir_texop_txf_ms_mcs:
vtn_fail("unexpected nir_texop_txf_ms_mcs");
+ case nir_texop_tex_prefetch:
+ vtn_fail("unexpected nir_texop_tex_prefetch");
}
unsigned idx = 4;