diff options
author | Jason Ekstrand <[email protected]> | 2018-11-13 09:45:03 -0600 |
---|---|---|
committer | Jason Ekstrand <[email protected]> | 2018-11-15 19:59:42 -0600 |
commit | d34fd81e7668b14158d63ade844a0e260b6f9152 (patch) | |
tree | 369c2a2d80630c70bd899485e7c7df3624c7db43 /src/compiler/spirv | |
parent | fb127f77295fb9409e089b9267fff32b5f51a0a2 (diff) |
nir: Add alignment parameters to SSBO, UBO, and shared access
This also changes spirv_to_nir and glsl_to_nir to set them. The one
place that doesn't set them is shared memory access lowering in
nir_lower_io. That will have to be updated before any consumers of it
can effectively use these new alignments.
Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
Acked-by: Karol Herbst <[email protected]>
Diffstat (limited to 'src/compiler/spirv')
-rw-r--r-- | src/compiler/spirv/spirv_to_nir.c | 2 | ||||
-rw-r--r-- | src/compiler/spirv/vtn_variables.c | 6 |
2 files changed, 8 insertions, 0 deletions
diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c index 77ce0be369e..4fa02b6fd7b 100644 --- a/src/compiler/spirv/spirv_to_nir.c +++ b/src/compiler/spirv/spirv_to_nir.c @@ -2762,6 +2762,7 @@ vtn_handle_atomics(struct vtn_builder *b, SpvOp opcode, switch (opcode) { case SpvOpAtomicLoad: atomic->num_components = glsl_get_vector_elements(ptr->type->type); + nir_intrinsic_set_align(atomic, 4, 0); if (ptr->mode == vtn_variable_mode_ssbo) atomic->src[src++] = nir_src_for_ssa(index); atomic->src[src++] = nir_src_for_ssa(offset); @@ -2770,6 +2771,7 @@ vtn_handle_atomics(struct vtn_builder *b, SpvOp opcode, case SpvOpAtomicStore: atomic->num_components = glsl_get_vector_elements(ptr->type->type); nir_intrinsic_set_write_mask(atomic, (1 << atomic->num_components) - 1); + nir_intrinsic_set_align(atomic, 4, 0); atomic->src[src++] = nir_src_for_ssa(vtn_ssa_value(b, w[4])->def); if (ptr->mode == vtn_variable_mode_ssbo) atomic->src[src++] = nir_src_for_ssa(index); diff --git a/src/compiler/spirv/vtn_variables.c b/src/compiler/spirv/vtn_variables.c index e1e2c8c26ba..53f52255dc3 100644 --- a/src/compiler/spirv/vtn_variables.c +++ b/src/compiler/spirv/vtn_variables.c @@ -646,6 +646,12 @@ _vtn_load_store_tail(struct vtn_builder *b, nir_intrinsic_op op, bool load, nir_intrinsic_set_access(instr, access); } + /* With extensions like relaxed_block_layout, we really can't guarantee + * much more than scalar alignment. + */ + if (op != nir_intrinsic_load_push_constant) + nir_intrinsic_set_align(instr, data_bit_size / 8, 0); + if (index) instr->src[src++] = nir_src_for_ssa(index); |