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authorKarol Herbst <[email protected]>2018-07-12 03:40:23 +0200
committerKarol Herbst <[email protected]>2018-07-17 13:24:09 +0200
commit1beef89ad85c47fb6dea565687682e14b8e21101 (patch)
tree3fcf7893574b44d734e39b06264a72d825d93cd4 /src/compiler/spirv/vtn_alu.c
parentf65bee7e85221ebbfa26168ca081ae20dc13a13b (diff)
nir: prepare for bumping up max components to 16
OpenCL knows vector of size 8 and 16. v2: rebased on master (nir_swizzle rework) rework more declarations with nir_component_mask_t adjust print_var_decl Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Karol Herbst <[email protected]>
Diffstat (limited to 'src/compiler/spirv/vtn_alu.c')
-rw-r--r--src/compiler/spirv/vtn_alu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/compiler/spirv/vtn_alu.c b/src/compiler/spirv/vtn_alu.c
index 5f9cc97fdfb..d7d17a825b7 100644
--- a/src/compiler/spirv/vtn_alu.c
+++ b/src/compiler/spirv/vtn_alu.c
@@ -246,7 +246,7 @@ vtn_handle_bitcast(struct vtn_builder *b, struct vtn_ssa_value *dest,
unsigned dest_components = glsl_get_vector_elements(dest->type);
vtn_assert(src_bit_size * src_components == dest_bit_size * dest_components);
- nir_ssa_def *dest_chan[4];
+ nir_ssa_def *dest_chan[NIR_MAX_VEC_COMPONENTS];
if (src_bit_size > dest_bit_size) {
vtn_assert(src_bit_size % dest_bit_size == 0);
unsigned divisor = src_bit_size / dest_bit_size;