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authorNeil Roberts <[email protected]>2018-03-21 20:34:39 +0100
committerNeil Roberts <[email protected]>2018-04-17 20:58:06 +0200
commit6e499572b9a7b33165b8438a85db37ae1ba0ce0e (patch)
tree560bf1dae863a2bc4aceacae96f7741a1d005439 /src/compiler/spirv/vtn_alu.c
parent696f4abcbc07b96724307823b9e807cd981da3b5 (diff)
spirv: Add a 64-bit implementation of OpIsInf
The only change neccessary is to change the type of the constant used to compare against. This has been tested against the arb_gpu_shader_fp64/execution/ fs-isinf-dvec tests using the ARB_gl_spirv branch. v2: Use nir_imm_floatN_t for the constant. Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/compiler/spirv/vtn_alu.c')
-rw-r--r--src/compiler/spirv/vtn_alu.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/compiler/spirv/vtn_alu.c b/src/compiler/spirv/vtn_alu.c
index fc378495b81..71e743cdd1e 100644
--- a/src/compiler/spirv/vtn_alu.c
+++ b/src/compiler/spirv/vtn_alu.c
@@ -564,10 +564,11 @@ vtn_handle_alu(struct vtn_builder *b, SpvOp opcode,
val->ssa->def = nir_fne(&b->nb, src[0], src[0]);
break;
- case SpvOpIsInf:
- val->ssa->def = nir_ieq(&b->nb, nir_fabs(&b->nb, src[0]),
- nir_imm_float(&b->nb, INFINITY));
+ case SpvOpIsInf: {
+ nir_ssa_def *inf = nir_imm_floatN_t(&b->nb, INFINITY, src[0]->bit_size);
+ val->ssa->def = nir_ieq(&b->nb, nir_fabs(&b->nb, src[0]), inf);
break;
+ }
case SpvOpFUnordEqual:
case SpvOpFUnordNotEqual: