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authorIago Toral Quiroga <[email protected]>2018-12-19 08:05:19 +0100
committerIago Toral Quiroga <[email protected]>2018-12-20 08:02:44 +0100
commitd6110d4d547ad98dce7a89d0e020ab5be5aaaad6 (patch)
treee632adae1c56e2d2818ecf555d4b15d2055bf68c /src/compiler/nir
parent1250383e367fef6fdb954d69a7444634c6788f5d (diff)
intel/compiler: move nir_lower_bool_to_int32 before nir_lower_locals_to_regs
The former expects to see SSA-only things, but the latter injects registers. The assertions in the lowering where not seeing this because they asserted on the bit_size values only, not on the is_ssa field, so add that assertion too. Fixes: 11dc1307794e "nir: Add a bool to int32 lowering pass" CC: [email protected] Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/compiler/nir')
-rw-r--r--src/compiler/nir/nir_lower_bool_to_int32.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/compiler/nir/nir_lower_bool_to_int32.c b/src/compiler/nir/nir_lower_bool_to_int32.c
index 064b27b9025..fdd2f55175d 100644
--- a/src/compiler/nir/nir_lower_bool_to_int32.c
+++ b/src/compiler/nir/nir_lower_bool_to_int32.c
@@ -46,6 +46,8 @@ lower_alu_instr(nir_alu_instr *alu)
{
const nir_op_info *op_info = &nir_op_infos[alu->op];
+ assert(alu->dest.dest.is_ssa);
+
switch (alu->op) {
case nir_op_imov:
case nir_op_vec2: