diff options
author | Ian Romanick <[email protected]> | 2019-09-24 15:55:49 -0700 |
---|---|---|
committer | Dylan Baker <[email protected]> | 2019-09-26 08:47:50 -0700 |
commit | bc6cc94d5a71110d203077aa4e11a97321ff205e (patch) | |
tree | 16c5390211407245f88e4e5ff2af45b883d8832e /src/compiler/nir/nir_range_analysis.c | |
parent | 6273d4d4ed7a5bfb67b06b78b519ccecfab32eb5 (diff) |
nir/range-analysis: Bail if the types don't match
Some shaders are hurt by this change because now a
load_const(0x00000000) is not recognized as eq_zero when loaded as a
float. This behavior is restored in a later patch (nir/range-analysis:
Use types to provide better ranges from bcsel and mov).
v2: Add a comment about reinterpretation of int/uint/bool. Suggested by
Caio. Rewrite condition the check for types being float versus checking
for types not being all the things that aren't float.
Fixes: 405de7ccb6c ("nir/range-analysis: Rudimentary value range analysis pass")
Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
All Gen7+ platforms had similar results. (Ice Lake shown)
total instructions in shared programs: 16327543 -> 16328255 (<.01%)
instructions in affected programs: 55928 -> 56640 (1.27%)
helped: 0
HURT: 208
HURT stats (abs) min: 1 max: 16 x̄: 3.42 x̃: 3
HURT stats (rel) min: 0.33% max: 6.74% x̄: 1.31% x̃: 1.12%
95% mean confidence interval for instructions value: 3.06 3.79
95% mean confidence interval for instructions %-change: 1.17% 1.46%
Instructions are HURT.
total cycles in shared programs: 363682759 -> 363683977 (<.01%)
cycles in affected programs: 325758 -> 326976 (0.37%)
helped: 44
HURT: 133
helped stats (abs) min: 1 max: 179 x̄: 33.61 x̃: 5
helped stats (rel) min: 0.06% max: 14.21% x̄: 2.47% x̃: 0.29%
HURT stats (abs) min: 1 max: 157 x̄: 20.28 x̃: 14
HURT stats (rel) min: 0.07% max: 14.44% x̄: 1.42% x̃: 0.73%
95% mean confidence interval for cycles value: 0.38 13.39
95% mean confidence interval for cycles %-change: -0.06% 0.96%
Inconclusive result (%-change mean confidence interval includes 0).
Sandy Bridge
total instructions in shared programs: 10787433 -> 10787443 (<.01%)
instructions in affected programs: 1842 -> 1852 (0.54%)
helped: 0
HURT: 10
HURT stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel) min: 0.33% max: 1.85% x̄: 0.73% x̃: 0.49%
95% mean confidence interval for instructions value: 1.00 1.00
95% mean confidence interval for instructions %-change: 0.36% 1.10%
Instructions are HURT.
total cycles in shared programs: 153724543 -> 153724563 (<.01%)
cycles in affected programs: 8407 -> 8427 (0.24%)
helped: 1
HURT: 3
helped stats (abs) min: 18 max: 18 x̄: 18.00 x̃: 18
helped stats (rel) min: 0.98% max: 0.98% x̄: 0.98% x̃: 0.98%
HURT stats (abs) min: 4 max: 18 x̄: 12.67 x̃: 16
HURT stats (rel) min: 0.21% max: 0.75% x̄: 0.56% x̃: 0.72%
95% mean confidence interval for cycles value: -21.31 31.31
95% mean confidence interval for cycles %-change: -1.11% 1.46%
Inconclusive result (value mean confidence interval includes 0).
No shader-db changes on Iron Lake or GM45.
(cherry picked from commit 018d2b524ad399ef9ea6d31de98de7078d702980)
Diffstat (limited to 'src/compiler/nir/nir_range_analysis.c')
-rw-r--r-- | src/compiler/nir/nir_range_analysis.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/src/compiler/nir/nir_range_analysis.c b/src/compiler/nir/nir_range_analysis.c index 114dedb49c1..6e8c4489f22 100644 --- a/src/compiler/nir/nir_range_analysis.c +++ b/src/compiler/nir/nir_range_analysis.c @@ -229,6 +229,26 @@ analyze_expression(const nir_alu_instr *instr, unsigned src, const struct nir_alu_instr *const alu = nir_instr_as_alu(instr->src[src].src.ssa->parent_instr); + const nir_alu_type use_type = nir_op_infos[instr->op].input_types[src]; + + /* Bail if the type of the instruction generating the value does not match + * the type the value will be interpreted as. int/uint/bool can be + * reinterpreted trivially. The most important cases are between float and + * non-float. + */ + if (alu->op != nir_op_mov && alu->op != nir_op_bcsel) { + const nir_alu_type use_base_type = + nir_alu_type_get_base_type(use_type); + const nir_alu_type src_base_type = + nir_alu_type_get_base_type(nir_op_infos[alu->op].output_type); + + if (use_base_type != src_base_type && + (use_base_type == nir_type_float || + src_base_type == nir_type_float)) { + return (struct ssa_result_range){unknown, false}; + } + } + struct hash_entry *he = _mesa_hash_table_search(ht, alu); if (he != NULL) return unpack_data(he->data); |