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authorEduardo Lima Mitev <[email protected]>2019-06-28 09:39:38 +0200
committerRob Clark <[email protected]>2019-10-18 15:08:54 -0700
commit32e5fbf47cbe6cca136076c5b25bfe7208c0eec8 (patch)
tree025069c57d413c487f91fe4dcb2bae5fd4f5e707 /src/compiler/nir/nir_opcodes.py
parent6ad442acae6c23397e3fd6dcd2fb8972f271e41f (diff)
nir: Add a new ALU nir_op_imad24_ir3
ir3 compiler has a signed integer multiply-add instruction (MAD_S24) that is used for different offset calculations in the backend. Since we intend to move some of these calculations to NIR, we need a new ALU op that can directly represent it. Signed-off-by: Rob Clark <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Eduardo Lima Mitev <[email protected]>
Diffstat (limited to 'src/compiler/nir/nir_opcodes.py')
-rw-r--r--src/compiler/nir/nir_opcodes.py7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/compiler/nir/nir_opcodes.py b/src/compiler/nir/nir_opcodes.py
index 5d589ee20bf..b759910cd80 100644
--- a/src/compiler/nir/nir_opcodes.py
+++ b/src/compiler/nir/nir_opcodes.py
@@ -1054,3 +1054,10 @@ opcode("imadsh_mix16", 1, tint32,
[1, 1, 1], [tint32, tint32, tint32], False, "", """
dst.x = ((((src0.x & 0xffff0000) >> 16) * (src1.x & 0x0000ffff)) << 16) + src2.x;
""")
+
+# ir3-specific instruction that maps directly to ir3 mad.s24.
+#
+# 24b multiply into 32b result (with sign extension) plus 32b int
+triop("imad24_ir3", tint32, _2src_commutative,
+ "(((int32_t)src0 << 8) >> 8) * (((int32_t)src1 << 8) >> 8) + src2")
+