nir: Rename Boolean-related opcodes to include 32 in the name

This is a squash of a bunch of individual changes:

    nir/builder: Generate 32-bit bool opcodes transparently

    nir/algebraic: Remap Boolean opcodes to the 32-bit variant

    Use 32-bit opcodes in the NIR producers and optimizations

        Generated with a little hand-editing and the following sed commands:

        sed -i 's/nir_op_ball_fequal/nir_op_b32all_fequal/g' **/*.c
        sed -i 's/nir_op_bany_fnequal/nir_op_b32any_fnequal/g' **/*.c
        sed -i 's/nir_op_ball_iequal/nir_op_b32all_iequal/g' **/*.c
        sed -i 's/nir_op_bany_inequal/nir_op_b32any_inequal/g' **/*.c
        sed -i 's/nir_op_\([fiu]lt\)/nir_op_\132/g' **/*.c
        sed -i 's/nir_op_\([fiu]ge\)/nir_op_\132/g' **/*.c
        sed -i 's/nir_op_\([fiu]ne\)/nir_op_\132/g' **/*.c
        sed -i 's/nir_op_\([fiu]eq\)/nir_op_\132/g' **/*.c
        sed -i 's/nir_op_\([fi]\)ne32g/nir_op_\1neg/g' **/*.c
        sed -i 's/nir_op_bcsel/nir_op_b32csel/g' **/*.c

     Use 32-bit opcodes in the NIR back-ends

        Generated with a little hand-editing and the following sed commands:

        sed -i 's/nir_op_ball_fequal/nir_op_b32all_fequal/g' **/*.c
        sed -i 's/nir_op_bany_fnequal/nir_op_b32any_fnequal/g' **/*.c
        sed -i 's/nir_op_ball_iequal/nir_op_b32all_iequal/g' **/*.c
        sed -i 's/nir_op_bany_inequal/nir_op_b32any_inequal/g' **/*.c
        sed -i 's/nir_op_\([fiu]lt\)/nir_op_\132/g' **/*.c
        sed -i 's/nir_op_\([fiu]ge\)/nir_op_\132/g' **/*.c
        sed -i 's/nir_op_\([fiu]ne\)/nir_op_\132/g' **/*.c
        sed -i 's/nir_op_\([fiu]eq\)/nir_op_\132/g' **/*.c
        sed -i 's/nir_op_\([fi]\)ne32g/nir_op_\1neg/g' **/*.c
        sed -i 's/nir_op_bcsel/nir_op_b32csel/g' **/*.c

Reviewed-by: Eric Anholt <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Tested-by: Bas Nieuwenhuizen <[email protected]>

1 files changed, 14 insertions, 14 deletions

diff --git a/src/compiler/nir/nir_loop_analyze.c b/src/compiler/nir/nir_loop_analyze.c
index 259f02a854e..a82a5113b5e 100644
--- a/src/compiler/nir/nir_loop_analyze.c
+++ b/src/compiler/nir/nir_loop_analyze.c
@@ -433,26 +433,26 @@ get_iteration(nir_op cond_op, nir_const_value *initial, nir_const_value *step,
    int32_t iter;
 
    switch (cond_op) {
-   case nir_op_ige:
-   case nir_op_ilt:
-   case nir_op_ieq:
-   case nir_op_ine: {
+   case nir_op_ige32:
+   case nir_op_ilt32:
+   case nir_op_ieq32:
+   case nir_op_ine32: {
       int32_t initial_val = initial->i32[0];
       int32_t span = limit->i32[0] - initial_val;
       iter = span / step->i32[0];
       break;
    }
-   case nir_op_uge:
-   case nir_op_ult: {
+   case nir_op_uge32:
+   case nir_op_ult32: {
       uint32_t initial_val = initial->u32[0];
       uint32_t span = limit->u32[0] - initial_val;
       iter = span / step->u32[0];
       break;
    }
-   case nir_op_fge:
-   case nir_op_flt:
-   case nir_op_feq:
-   case nir_op_fne: {
+   case nir_op_fge32:
+   case nir_op_flt32:
+   case nir_op_feq32:
+   case nir_op_fne32: {
       float initial_val = initial->f32[0];
       float span = limit->f32[0] - initial_val;
       iter = span / step->f32[0];
@@ -623,10 +623,10 @@ find_trip_count(loop_info_state *state)
       bool limit_rhs = true;
 
       switch (alu->op) {
-      case nir_op_fge:      case nir_op_ige:      case nir_op_uge:
-      case nir_op_flt:      case nir_op_ilt:      case nir_op_ult:
-      case nir_op_feq:      case nir_op_ieq:
-      case nir_op_fne:      case nir_op_ine:
+      case nir_op_fge32:      case nir_op_ige32:      case nir_op_uge32:
+      case nir_op_flt32:      case nir_op_ilt32:      case nir_op_ult32:
+      case nir_op_feq32:      case nir_op_ieq32:
+      case nir_op_fne32:      case nir_op_ine32:
 
          /* We assume that the limit is the "right" operand */
          basic_ind = get_loop_var(alu->src[0].src.ssa, state);