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authorJason Ekstrand <[email protected]>2018-08-14 14:03:05 -0500
committerJason Ekstrand <[email protected]>2018-08-29 14:04:02 -0500
commit15d39f474b89093507a80813d149c40461b8f355 (patch)
tree0898b5f25a31037c16983d8f09e30ce425ef98d2 /src/compiler/nir/nir_intrinsics.py
parent7cdf8f9339017ea5ee3c7f3a585c6bd5a815b99b (diff)
nir: Make image load/store intrinsics variable-width
Instead of requiring 4 components, this allows them to potentially use fewer. Both the SPIR-V and GLSL paths still generate vec4 intrinsics so drivers which assume 4 components should be safe. However, we want to be able to shrink them for i965. Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/compiler/nir/nir_intrinsics.py')
-rw-r--r--src/compiler/nir/nir_intrinsics.py4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/compiler/nir/nir_intrinsics.py b/src/compiler/nir/nir_intrinsics.py
index 67d336fd536..17212c4862f 100644
--- a/src/compiler/nir/nir_intrinsics.py
+++ b/src/compiler/nir/nir_intrinsics.py
@@ -297,9 +297,9 @@ atomic3("atomic_counter_comp_swap")
# argument with the value to be written, and image atomic operations take
# either one or two additional scalar arguments with the same meaning as in
# the ARB_shader_image_load_store specification.
-intrinsic("image_deref_load", src_comp=[1, 4, 1], dest_comp=4,
+intrinsic("image_deref_load", src_comp=[1, 4, 1], dest_comp=0,
flags=[CAN_ELIMINATE])
-intrinsic("image_deref_store", src_comp=[1, 4, 1, 4])
+intrinsic("image_deref_store", src_comp=[1, 4, 1, 0])
intrinsic("image_deref_atomic_add", src_comp=[1, 4, 1, 1], dest_comp=1)
intrinsic("image_deref_atomic_min", src_comp=[1, 4, 1, 1], dest_comp=1)
intrinsic("image_deref_atomic_max", src_comp=[1, 4, 1, 1], dest_comp=1)