summaryrefslogtreecommitdiffstats
path: root/src/compiler/nir/nir.c
diff options
context:
space:
mode:
authorMatt Turner <[email protected]>2017-06-22 16:37:51 -0700
committerMatt Turner <[email protected]>2017-07-20 16:56:49 -0700
commit43ef75b394f1cd779a54a22fe16fbb5ef23f0458 (patch)
tree60122c01065572e95fa49b427d7a0cfbc6066542 /src/compiler/nir/nir.c
parent636fe4d1c6b21e9efecd4bce1cedd67afa33343a (diff)
nir: Add system values from ARB_shader_ballot
We already had a channel_num system value, which I'm renaming to subgroup_invocation to match the rest of the new system values. Note that while ballotARB(true) will return zeros in the high 32-bits on systems where gl_SubGroupSizeARB <= 32, the gl_SubGroup??MaskARB variables do not consider whether channels are enabled. See issue (1) of ARB_shader_ballot. Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/compiler/nir/nir.c')
-rw-r--r--src/compiler/nir/nir.c28
1 files changed, 28 insertions, 0 deletions
diff --git a/src/compiler/nir/nir.c b/src/compiler/nir/nir.c
index 491b908396c..b608b2a0d64 100644
--- a/src/compiler/nir/nir.c
+++ b/src/compiler/nir/nir.c
@@ -1908,6 +1908,20 @@ nir_intrinsic_from_system_value(gl_system_value val)
return nir_intrinsic_load_helper_invocation;
case SYSTEM_VALUE_VIEW_INDEX:
return nir_intrinsic_load_view_index;
+ case SYSTEM_VALUE_SUBGROUP_SIZE:
+ return nir_intrinsic_load_subgroup_size;
+ case SYSTEM_VALUE_SUBGROUP_INVOCATION:
+ return nir_intrinsic_load_subgroup_invocation;
+ case SYSTEM_VALUE_SUBGROUP_EQ_MASK:
+ return nir_intrinsic_load_subgroup_eq_mask;
+ case SYSTEM_VALUE_SUBGROUP_GE_MASK:
+ return nir_intrinsic_load_subgroup_ge_mask;
+ case SYSTEM_VALUE_SUBGROUP_GT_MASK:
+ return nir_intrinsic_load_subgroup_gt_mask;
+ case SYSTEM_VALUE_SUBGROUP_LE_MASK:
+ return nir_intrinsic_load_subgroup_le_mask;
+ case SYSTEM_VALUE_SUBGROUP_LT_MASK:
+ return nir_intrinsic_load_subgroup_lt_mask;
default:
unreachable("system value does not directly correspond to intrinsic");
}
@@ -1961,6 +1975,20 @@ nir_system_value_from_intrinsic(nir_intrinsic_op intrin)
return SYSTEM_VALUE_HELPER_INVOCATION;
case nir_intrinsic_load_view_index:
return SYSTEM_VALUE_VIEW_INDEX;
+ case SYSTEM_VALUE_SUBGROUP_SIZE:
+ return nir_intrinsic_load_subgroup_size;
+ case SYSTEM_VALUE_SUBGROUP_INVOCATION:
+ return nir_intrinsic_load_subgroup_invocation;
+ case nir_intrinsic_load_subgroup_eq_mask:
+ return SYSTEM_VALUE_SUBGROUP_EQ_MASK;
+ case nir_intrinsic_load_subgroup_ge_mask:
+ return SYSTEM_VALUE_SUBGROUP_GE_MASK;
+ case nir_intrinsic_load_subgroup_gt_mask:
+ return SYSTEM_VALUE_SUBGROUP_GT_MASK;
+ case nir_intrinsic_load_subgroup_le_mask:
+ return SYSTEM_VALUE_SUBGROUP_LE_MASK;
+ case nir_intrinsic_load_subgroup_lt_mask:
+ return SYSTEM_VALUE_SUBGROUP_LT_MASK;
default:
unreachable("intrinsic doesn't produce a system value");
}