diff options
author | Eric Anholt <[email protected]> | 2018-07-20 12:19:36 -0700 |
---|---|---|
committer | Eric Anholt <[email protected]> | 2018-07-23 10:21:43 -0700 |
commit | 58c1d3860fefc16878670f1d25dc8187a81cb01b (patch) | |
tree | d7b36d2d20cccf4fa4ced608401291eb68030360 /src/broadcom/qpu/qpu_instr.c | |
parent | cdfa99657dd56f80c2e966ac1af8a908d007baa2 (diff) |
v3d: Add QPU pack/unpack for the new SFU instructions.
These instructions allow writing the result to any register, instead of a
special writeback to r4.
Diffstat (limited to 'src/broadcom/qpu/qpu_instr.c')
-rw-r--r-- | src/broadcom/qpu/qpu_instr.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/broadcom/qpu/qpu_instr.c b/src/broadcom/qpu/qpu_instr.c index 9e051e6c433..deaa533c8ae 100644 --- a/src/broadcom/qpu/qpu_instr.c +++ b/src/broadcom/qpu/qpu_instr.c @@ -107,6 +107,7 @@ v3d_qpu_add_op_name(enum v3d_qpu_add_op op) [V3D_QPU_A_FLAPUSH] = "flapush", [V3D_QPU_A_FLBPUSH] = "flbpush", [V3D_QPU_A_FLPOP] = "flpop", + [V3D_QPU_A_RECIP] = "recip", [V3D_QPU_A_SETMSF] = "setmsf", [V3D_QPU_A_SETREVF] = "setrevf", [V3D_QPU_A_NOP] = "nop", @@ -135,6 +136,11 @@ v3d_qpu_add_op_name(enum v3d_qpu_add_op op) [V3D_QPU_A_LDVPMD_IN] = "ldvpmd_in", [V3D_QPU_A_LDVPMD_OUT] = "ldvpmd_out", [V3D_QPU_A_LDVPMP] = "ldvpmp", + [V3D_QPU_A_RSQRT] = "rsqrt", + [V3D_QPU_A_EXP] = "exp", + [V3D_QPU_A_LOG] = "log", + [V3D_QPU_A_SIN] = "sin", + [V3D_QPU_A_RSQRT2] = "rsqrt2", [V3D_QPU_A_LDVPMG_IN] = "ldvpmg_in", [V3D_QPU_A_LDVPMG_OUT] = "ldvpmg_out", [V3D_QPU_A_FCMP] = "fcmp", @@ -369,6 +375,7 @@ static const uint8_t add_op_args[] = { [V3D_QPU_A_FLAPUSH] = D | A, [V3D_QPU_A_FLBPUSH] = D | A, [V3D_QPU_A_FLPOP] = D | A, + [V3D_QPU_A_RECIP] = D | A, [V3D_QPU_A_SETMSF] = D | A, [V3D_QPU_A_SETREVF] = D | A, [V3D_QPU_A_NOP] = 0, @@ -401,6 +408,11 @@ static const uint8_t add_op_args[] = { [V3D_QPU_A_LDVPMD_IN] = D | A, [V3D_QPU_A_LDVPMD_OUT] = D | A, [V3D_QPU_A_LDVPMP] = D | A, + [V3D_QPU_A_RSQRT] = D | A, + [V3D_QPU_A_EXP] = D | A, + [V3D_QPU_A_LOG] = D | A, + [V3D_QPU_A_SIN] = D | A, + [V3D_QPU_A_RSQRT2] = D | A, [V3D_QPU_A_LDVPMG_IN] = D | A | B, [V3D_QPU_A_LDVPMG_OUT] = D | A | B, |