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authorDaniel Schürmann <[email protected]>2019-01-26 09:12:46 +0100
committerDaniel Schürmann <[email protected]>2019-06-24 18:42:20 +0200
commit165b7f3a4487e7ab7738dd9b37f2b3375692f8a2 (patch)
tree9a077679a17a8e48b43f7cb67b22ec7e737948b4 /src/broadcom/compiler
parenta74f256c58a2c1fca3ce75e5199a04a22768450e (diff)
nir: define behavior of nir_op_bfm and nir_op_u/ibfe according to SM5 spec.
That is: the five least significant bits provide the values of 'bits' and 'offset' which is the case for all hardware currently supported by NIR and using the bfm/bfe instructions. This patch also changes the lowering of bitfield_insert/extract using shifts to not use bfm and removes the flag 'lower_bfm'. Tested-by: Eric Anholt <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
Diffstat (limited to 'src/broadcom/compiler')
-rw-r--r--src/broadcom/compiler/nir_to_vir.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/broadcom/compiler/nir_to_vir.c b/src/broadcom/compiler/nir_to_vir.c
index 242414983e1..cb58b737a80 100644
--- a/src/broadcom/compiler/nir_to_vir.c
+++ b/src/broadcom/compiler/nir_to_vir.c
@@ -2392,7 +2392,6 @@ const nir_shader_compiler_options v3d_nir_options = {
.lower_all_io_to_temps = true,
.lower_extract_byte = true,
.lower_extract_word = true,
- .lower_bfm = true,
.lower_bitfield_insert_to_shifts = true,
.lower_bitfield_extract_to_shifts = true,
.lower_bitfield_reverse = true,