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authorEric Anholt <[email protected]>2018-01-11 11:53:13 -0800
committerEric Anholt <[email protected]>2018-01-12 21:57:21 -0800
commit368bab43fd63ec395a2e178ce067f41bae7a1ea0 (patch)
treeba0b6713596a4b914052b331e4edaa8abf78d64a /src/broadcom/compiler/vir_to_qpu.c
parentaf9753e246c2a4371a289b44064483ece8d1ad5d (diff)
broadcom/vc5: Add support for loading varyings in V3D 4.1.
The LDVARY signal now writes an arbitrary register, so I took out the magic src register file and replaced it with an instruction with LDVARY set so we have somewhere to hang a QFILE_TEMP destination for register allocation.
Diffstat (limited to 'src/broadcom/compiler/vir_to_qpu.c')
-rw-r--r--src/broadcom/compiler/vir_to_qpu.c7
1 files changed, 0 insertions, 7 deletions
diff --git a/src/broadcom/compiler/vir_to_qpu.c b/src/broadcom/compiler/vir_to_qpu.c
index 9229fa5ba47..432f156218c 100644
--- a/src/broadcom/compiler/vir_to_qpu.c
+++ b/src/broadcom/compiler/vir_to_qpu.c
@@ -189,12 +189,6 @@ v3d_generate_code_block(struct v3d_compile *c,
src[i] = qpu_acc(5);
break;
- case QFILE_VARY:
- temp = new_qpu_nop_before(qinst);
- temp->qpu.sig.ldvary = true;
-
- src[i] = qpu_acc(3);
- break;
case QFILE_SMALL_IMM:
abort(); /* XXX */
#if 0
@@ -255,7 +249,6 @@ v3d_generate_code_block(struct v3d_compile *c,
dst = qpu_magic(V3D_QPU_WADDR_TLBU);
break;
- case QFILE_VARY:
case QFILE_UNIF:
case QFILE_SMALL_IMM:
case QFILE_LOAD_IMM: