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authorEric Anholt <[email protected]>2018-01-04 15:35:28 -0800
committerEric Anholt <[email protected]>2018-01-12 21:54:33 -0800
commit22a02f3e344d6bc47e3e30949a36d00a9eae84a9 (patch)
tree632ed61f4bee7c932baf6383d256c4ec304994cd /src/broadcom/compiler/vir.c
parent55f8a01acae7c4171ccfef301e48dc3cc67f5836 (diff)
broadcom/vc5: Use the new LDVPM/STVPM opcodes on V3D 4.1.
Now, instead of a magic write register for VPM stores we have an instruction to do them (which means no packing of other ALU ops into it), with the ability to reorder the VPM stores due to the offset being baked into the instruction. VPM loads also gain the ability to be reordered by packing the row into the A argument. They also no longer write to the r3 accumulator, and instead must be stored to a physical register.
Diffstat (limited to 'src/broadcom/compiler/vir.c')
-rw-r--r--src/broadcom/compiler/vir.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/src/broadcom/compiler/vir.c b/src/broadcom/compiler/vir.c
index c129bb047e6..80d11aaf7f6 100644
--- a/src/broadcom/compiler/vir.c
+++ b/src/broadcom/compiler/vir.c
@@ -92,6 +92,9 @@ vir_has_side_effects(struct v3d_compile *c, struct qinst *inst)
case V3D_QPU_A_SETREVF:
case V3D_QPU_A_SETMSF:
case V3D_QPU_A_VPMSETUP:
+ case V3D_QPU_A_STVPMV:
+ case V3D_QPU_A_STVPMD:
+ case V3D_QPU_A_STVPMP:
return true;
default:
break;
@@ -412,10 +415,6 @@ static void
vir_emit(struct v3d_compile *c, struct qinst *inst)
{
list_addtail(&inst->link, &c->cur_block->instructions);
-
- if (inst->dst.file == QFILE_MAGIC &&
- inst->dst.index == V3D_QPU_WADDR_VPM)
- c->num_vpm_writes++;
}
/* Updates inst to write to a new temporary, emits it, and notes the def. */