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authorDave Airlie <[email protected]>2017-08-21 06:00:49 +0100
committerDave Airlie <[email protected]>2017-08-24 01:14:14 +0100
commitd987b4ab9e240b479c71129c3c261982112c57d8 (patch)
treedc4e171e968db3cea87f2c1f95118285339a3b35 /src/amd
parent11834195e9c276e1f3756cf8f6161be14124261b (diff)
radv/gfx9: fixup db/stencil disable.
This fixes disabled Z/stencil. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: "17.2" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd')
-rw-r--r--src/amd/vulkan/radv_cmd_buffer.c10
1 files changed, 7 insertions, 3 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 94453094eb6..26a230799ce 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1247,9 +1247,13 @@ radv_emit_framebuffer_state(struct radv_cmd_buffer *cmd_buffer)
}
radv_load_depth_clear_regs(cmd_buffer, image);
} else {
- radeon_set_context_reg_seq(cmd_buffer->cs, R_028040_DB_Z_INFO, 2);
- radeon_emit(cmd_buffer->cs, S_028040_FORMAT(V_028040_Z_INVALID)); /* R_028040_DB_Z_INFO */
- radeon_emit(cmd_buffer->cs, S_028044_FORMAT(V_028044_STENCIL_INVALID)); /* R_028044_DB_STENCIL_INFO */
+ if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9)
+ radeon_set_context_reg_seq(cmd_buffer->cs, R_028038_DB_Z_INFO, 2);
+ else
+ radeon_set_context_reg_seq(cmd_buffer->cs, R_028040_DB_Z_INFO, 2);
+
+ radeon_emit(cmd_buffer->cs, S_028040_FORMAT(V_028040_Z_INVALID)); /* DB_Z_INFO */
+ radeon_emit(cmd_buffer->cs, S_028044_FORMAT(V_028044_STENCIL_INVALID)); /* DB_STENCIL_INFO */
}
radeon_set_context_reg(cmd_buffer->cs, R_028208_PA_SC_WINDOW_SCISSOR_BR,
S_028208_BR_X(framebuffer->width) |