diff options
author | Bas Nieuwenhuizen <[email protected]> | 2019-12-31 21:19:20 +0100 |
---|---|---|
committer | Bas Nieuwenhuizen <[email protected]> | 2020-01-12 14:01:59 +0100 |
commit | bfd9e7ff243a48873721fd57d9a159cc82f580d6 (patch) | |
tree | 04249a840fd160c652558de196a7831dba8bc150 /src/amd | |
parent | f06be7945725c89851380883e263c129d3b395a3 (diff) |
radv: Use new scanout gfx9 metadata flag.
This updates for the new metadata ABI in radeonsi.
Reviewed-by: Samuel Pitoiset <[email protected]>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3244>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3244>
Diffstat (limited to 'src/amd')
-rw-r--r-- | src/amd/vulkan/radv_image.c | 18 | ||||
-rw-r--r-- | src/amd/vulkan/radv_radeon_winsys.h | 1 | ||||
-rw-r--r-- | src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c | 5 |
3 files changed, 14 insertions, 10 deletions
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index 29bf382c03b..220cd91188d 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -129,17 +129,14 @@ radv_use_tc_compat_htile_for_image(struct radv_device *device, static bool radv_surface_has_scanout(struct radv_device *device, const struct radv_image_create_info *info) { - if (info->scanout) - return true; - - if (!info->bo_metadata) - return false; - - if (device->physical_device->rad_info.chip_class >= GFX9) { - return info->bo_metadata->u.gfx9.swizzle_mode == 0 || info->bo_metadata->u.gfx9.swizzle_mode % 4 == 2; - } else { - return info->bo_metadata->u.legacy.scanout; + if (info->bo_metadata) { + if (device->physical_device->rad_info.chip_class >= GFX9) + return info->bo_metadata->u.gfx9.scanout; + else + return info->bo_metadata->u.legacy.scanout; } + + return info->scanout; } static bool @@ -1152,6 +1149,7 @@ radv_init_metadata(struct radv_device *device, if (device->physical_device->rad_info.chip_class >= GFX9) { metadata->u.gfx9.swizzle_mode = surface->u.gfx9.surf.swizzle_mode; + metadata->u.gfx9.scanout = (surface->flags & RADEON_SURF_SCANOUT) != 0; } else { metadata->u.legacy.microtile = surface->u.legacy.level[0].mode >= RADEON_SURF_MODE_1D ? RADEON_LAYOUT_TILED : RADEON_LAYOUT_LINEAR; diff --git a/src/amd/vulkan/radv_radeon_winsys.h b/src/amd/vulkan/radv_radeon_winsys.h index 339578d1a33..c8790917bcc 100644 --- a/src/amd/vulkan/radv_radeon_winsys.h +++ b/src/amd/vulkan/radv_radeon_winsys.h @@ -144,6 +144,7 @@ struct radeon_bo_metadata { struct { /* surface flags */ unsigned swizzle_mode:5; + bool scanout; } gfx9; } u; diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c index bfa02efd3e1..9e19b7b1f89 100644 --- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c +++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c @@ -38,6 +38,9 @@ #include "util/u_atomic.h" +#define AMDGPU_TILING_SCANOUT_SHIFT 63 +#define AMDGPU_TILING_SCANOUT_MASK 1 + static void radv_amdgpu_winsys_bo_destroy(struct radeon_winsys_bo *_bo); static int @@ -667,6 +670,7 @@ radv_amdgpu_winsys_bo_set_metadata(struct radeon_winsys_bo *_bo, if (bo->ws->info.chip_class >= GFX9) { tiling_flags |= AMDGPU_TILING_SET(SWIZZLE_MODE, md->u.gfx9.swizzle_mode); + tiling_flags |= AMDGPU_TILING_SET(SCANOUT, md->u.gfx9.scanout); } else { if (md->u.legacy.macrotile == RADEON_LAYOUT_TILED) tiling_flags |= AMDGPU_TILING_SET(ARRAY_MODE, 4); /* 2D_TILED_THIN1 */ @@ -711,6 +715,7 @@ radv_amdgpu_winsys_bo_get_metadata(struct radeon_winsys_bo *_bo, if (bo->ws->info.chip_class >= GFX9) { md->u.gfx9.swizzle_mode = AMDGPU_TILING_GET(tiling_flags, SWIZZLE_MODE); + md->u.gfx9.scanout = AMDGPU_TILING_GET(tiling_flags, SCANOUT); } else { md->u.legacy.microtile = RADEON_LAYOUT_LINEAR; md->u.legacy.macrotile = RADEON_LAYOUT_LINEAR; |