diff options
| author | Bas Nieuwenhuizen <[email protected]> | 2017-03-14 21:46:54 +0100 |
|---|---|---|
| committer | Emil Velikov <[email protected]> | 2017-03-16 01:34:02 +0000 |
| commit | 804e260859733b04aaf6d824a25d2ac047d9fc4e (patch) | |
| tree | 576cbe7680aebd6f45edd3f4eebbdd018ae982b3 /src/amd | |
| parent | f5be65efb7b66894e055e4fce2311a71db730b12 (diff) | |
radv: Emit cache flushes before CP DMA.
The flushes could be due to TRANSFER barriers.
Signed-off-by: Bas Nieuwenhuizen <[email protected]>
Cc: 17.0 <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
(cherry picked from commit cce43f6d8c40222099badaf52344d6a0eed993f3)
Diffstat (limited to 'src/amd')
| -rw-r--r-- | src/amd/vulkan/si_cmd_buffer.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index 5abb12103a5..430ef13fcd5 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -881,6 +881,7 @@ void si_cp_dma_buffer_copy(struct radv_cmd_buffer *cmd_buffer, uint64_t main_src_va, main_dest_va; uint64_t skipped_size = 0, realign_size = 0; + si_emit_cache_flush(cmd_buffer); if (cmd_buffer->device->physical_device->rad_info.family <= CHIP_CARRIZO || cmd_buffer->device->physical_device->rad_info.family == CHIP_STONEY) { @@ -944,6 +945,8 @@ void si_cp_dma_clear_buffer(struct radv_cmd_buffer *cmd_buffer, uint64_t va, assert(va % 4 == 0 && size % 4 == 0); + si_emit_cache_flush(cmd_buffer); + while (size) { unsigned byte_count = MIN2(size, CP_DMA_MAX_BYTE_COUNT); unsigned dma_flags = 0; |