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authorBas Nieuwenhuizen <[email protected]>2018-09-03 02:19:25 +0200
committerBas Nieuwenhuizen <[email protected]>2018-09-03 09:24:30 +0200
commit4dc244eb447b1fa4e39d67a58328ed774395c901 (patch)
tree4a13efee406adf6d781f082e3d3f531f35bc82eb /src/amd
parentc1ba33c34b804ddce2de18ca3c13611202d8e38b (diff)
radv: Add VEGA20 support.
Just mirror the radeonsi bits. Since this is just adding the extra switch entries for new HW I think this should be fine for stable. CC: <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
Diffstat (limited to 'src/amd')
-rw-r--r--src/amd/vulkan/radv_pipeline.c1
-rw-r--r--src/amd/vulkan/si_cmd_buffer.c1
2 files changed, 2 insertions, 0 deletions
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 13477231a4f..1741d5e9047 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -2539,6 +2539,7 @@ radv_pipeline_generate_binning_state(struct radeon_cmdbuf *cs,
switch (pipeline->device->physical_device->rad_info.family) {
case CHIP_VEGA10:
case CHIP_VEGA12:
+ case CHIP_VEGA20:
context_states_per_bin = 1;
persistent_states_per_bin = 1;
fpovs_per_batch = 63;
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
index 2cfa7f4c2c3..435878c3722 100644
--- a/src/amd/vulkan/si_cmd_buffer.c
+++ b/src/amd/vulkan/si_cmd_buffer.c
@@ -340,6 +340,7 @@ si_emit_config(struct radv_physical_device *physical_device,
switch (physical_device->rad_info.family) {
case CHIP_VEGA10:
case CHIP_VEGA12:
+ case CHIP_VEGA20:
pc_lines = 4096;
break;
case CHIP_RAVEN: