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authorSamuel Pitoiset <[email protected]>2019-01-22 19:30:20 +0100
committerSamuel Pitoiset <[email protected]>2019-01-23 09:43:53 +0100
commit698afa177ec52220b3f0045f6488d91e5405ab3d (patch)
tree5894c2dc0de738c4f80b09500d9bfc81c53ef0f6 /src/amd
parente0485a1dd7f0df90fb7049c23425aa693a284bad (diff)
radv: improve gathering of load_push_constants with dynamic bindings
For example, if a pipeline has two stages VS and FS. And if only the fragment stage needs dynamic bindings, we shouldn't allocate an extra user SGPR for the vertex stage. Of course, if the vertex stage loads constants, it needs an user SGPR. This should reduce the number of SET_SH_REG packets that are emitted. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd')
-rw-r--r--src/amd/vulkan/radv_descriptor_set.c3
-rw-r--r--src/amd/vulkan/radv_descriptor_set.h1
-rw-r--r--src/amd/vulkan/radv_shader_info.c4
3 files changed, 7 insertions, 1 deletions
diff --git a/src/amd/vulkan/radv_descriptor_set.c b/src/amd/vulkan/radv_descriptor_set.c
index 526bb77a553..30f982252bb 100644
--- a/src/amd/vulkan/radv_descriptor_set.c
+++ b/src/amd/vulkan/radv_descriptor_set.c
@@ -345,6 +345,7 @@ VkResult radv_CreatePipelineLayout(
layout->num_sets = pCreateInfo->setLayoutCount;
unsigned dynamic_offset_count = 0;
+ uint16_t dynamic_shader_stages = 0;
_mesa_sha1_init(&ctx);
@@ -356,6 +357,7 @@ VkResult radv_CreatePipelineLayout(
layout->set[set].dynamic_offset_start = dynamic_offset_count;
for (uint32_t b = 0; b < set_layout->binding_count; b++) {
dynamic_offset_count += set_layout->binding[b].array_size * set_layout->binding[b].dynamic_offset_count;
+ dynamic_shader_stages |= set_layout->dynamic_shader_stages;
if (set_layout->binding[b].immutable_samplers_offset)
_mesa_sha1_update(&ctx, radv_immutable_samplers(set_layout, set_layout->binding + b),
set_layout->binding[b].array_size * 4 * sizeof(uint32_t));
@@ -365,6 +367,7 @@ VkResult radv_CreatePipelineLayout(
}
layout->dynamic_offset_count = dynamic_offset_count;
+ layout->dynamic_shader_stages = dynamic_shader_stages;
layout->push_constant_size = 0;
for (unsigned i = 0; i < pCreateInfo->pushConstantRangeCount; ++i) {
diff --git a/src/amd/vulkan/radv_descriptor_set.h b/src/amd/vulkan/radv_descriptor_set.h
index d8431241fd9..7b13c6fb621 100644
--- a/src/amd/vulkan/radv_descriptor_set.h
+++ b/src/amd/vulkan/radv_descriptor_set.h
@@ -85,6 +85,7 @@ struct radv_pipeline_layout {
uint32_t num_sets;
uint32_t push_constant_size;
uint32_t dynamic_offset_count;
+ uint16_t dynamic_shader_stages;
unsigned char sha1[20];
};
diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c
index c2e005e63dd..7e5a3789af2 100644
--- a/src/amd/vulkan/radv_shader_info.c
+++ b/src/amd/vulkan/radv_shader_info.c
@@ -512,8 +512,10 @@ radv_nir_shader_info_pass(const struct nir_shader *nir,
struct nir_function *func =
(struct nir_function *)exec_list_get_head_const(&nir->functions);
- if (options->layout && options->layout->dynamic_offset_count)
+ if (options->layout && options->layout->dynamic_offset_count &&
+ (options->layout->dynamic_shader_stages & mesa_to_vk_shader_stage(nir->info.stage))) {
info->loads_push_constants = true;
+ }
nir_foreach_variable(variable, &nir->inputs)
gather_info_input_decl(nir, variable, info);