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authorBas Nieuwenhuizen <[email protected]>2017-10-21 03:07:43 +0200
committerBas Nieuwenhuizen <[email protected]>2017-10-21 12:46:44 +0200
commit24fe4e6143aa06a8aaa1b2cabaee84064a0efbd9 (patch)
treeaa4ad4cd87712800e409387a554191627e28c081 /src/amd
parent9e82f2b3ea126d297286e71eab5311afcca16f25 (diff)
ac/nir: Set larged wrokgroup size for GS on GFX9.
They don't take a single wave anymore and we need the barriers. Fixes: 6bc42855f92 'radv: enable GS on GFX9' Reviewed-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd')
-rw-r--r--src/amd/common/ac_nir_to_llvm.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 02420f46966..ca856bb2f9e 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -6457,7 +6457,7 @@ ac_nir_get_max_workgroup_size(enum chip_class chip_class,
case MESA_SHADER_TESS_CTRL:
return chip_class >= CIK ? 128 : 64;
case MESA_SHADER_GEOMETRY:
- return 64;
+ return chip_class >= GFX9 ? 128 : 64;
case MESA_SHADER_COMPUTE:
break;
default: