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authorSamuel Pitoiset <[email protected]>2020-01-16 14:04:49 +0100
committerMarge Bot <[email protected]>2020-01-20 16:24:55 +0000
commitb8abfafe8690847dc09bb63a5674dc2e2228a56a (patch)
treeccfd6cadf98aa5bd96a2d18c2bb3ae71d5a42c3a /src/amd
parentdd92179a72e5263b9db730d92a883e2536aa4474 (diff)
aco: fix constant folding of SMRD instructions on GFX6
SMRD instructions have an 8-bit dword offset on SI. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-By: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3432>
Diffstat (limited to 'src/amd')
-rw-r--r--src/amd/compiler/aco_optimizer.cpp4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/amd/compiler/aco_optimizer.cpp b/src/amd/compiler/aco_optimizer.cpp
index 8c2514598f0..7e05204d3b5 100644
--- a/src/amd/compiler/aco_optimizer.cpp
+++ b/src/amd/compiler/aco_optimizer.cpp
@@ -817,7 +817,9 @@ void label_instruction(opt_ctx &ctx, Block& block, aco_ptr<Instruction>& instr)
Temp base;
uint32_t offset;
if (i == 1 && info.is_constant_or_literal() &&
- (ctx.program->chip_class < GFX8 || info.val <= 0xFFFFF)) {
+ ((ctx.program->chip_class == GFX6 && info.val <= 0x3FF) ||
+ (ctx.program->chip_class == GFX7 && info.val <= 0xFFFFFFFF) ||
+ (ctx.program->chip_class >= GFX8 && info.val <= 0xFFFFF))) {
instr->operands[i] = Operand(info.val);
continue;
} else if (i == 1 && parse_base_offset(ctx, instr.get(), i, &base, &offset) && base.regClass() == s1 && offset <= 0xFFFFF && ctx.program->chip_class >= GFX9) {