diff options
| author | Bas Nieuwenhuizen <[email protected]> | 2017-10-16 23:58:48 +0200 |
|---|---|---|
| committer | Bas Nieuwenhuizen <[email protected]> | 2017-10-19 22:24:20 +0200 |
| commit | 163a4bf3864fbe45ee44820c2fee08bea18bb3c6 (patch) | |
| tree | db0f71019541f18a29adfff8305d0bf20e05dc76 /src/amd | |
| parent | bfda35c8dd4bc602a3b174377dfea92319438e2b (diff) | |
ac: Parse the new HS RSRC1 register.
Reviewed-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd')
| -rw-r--r-- | src/amd/common/ac_binary.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/amd/common/ac_binary.c b/src/amd/common/ac_binary.c index 1bf52c78328..cf0125c415f 100644 --- a/src/amd/common/ac_binary.c +++ b/src/amd/common/ac_binary.c @@ -252,6 +252,7 @@ void ac_shader_binary_read_config(struct ac_shader_binary *binary, case R_00B128_SPI_SHADER_PGM_RSRC1_VS: case R_00B228_SPI_SHADER_PGM_RSRC1_GS: case R_00B848_COMPUTE_PGM_RSRC1: + case R_00B428_SPI_SHADER_PGM_RSRC1_HS: conf->num_sgprs = MAX2(conf->num_sgprs, (G_00B028_SGPRS(value) + 1) * 8); conf->num_vgprs = MAX2(conf->num_vgprs, (G_00B028_VGPRS(value) + 1) * 4); conf->float_mode = G_00B028_FLOAT_MODE(value); |