diff options
| author | Rhys Perry <[email protected]> | 2019-05-30 15:55:11 +0100 |
|---|---|---|
| committer | Rhys Perry <[email protected]> | 2019-06-04 17:30:53 +0100 |
| commit | d4a2f8b33bead997e5629eb3f15c3632e930022d (patch) | |
| tree | d4c203a3ca4c8dc11803eea2acf2fa0e07fa754a /src/amd | |
| parent | a84de3fb7c1198f7cbd3b20a4231c14a7010f97f (diff) | |
radv: fix some compiler warnings
Fixes -Woverflow warnings with GCC 9.1.1
v2: use a cast instead of a bitwise and
Signed-off-by: Rhys Perry <[email protected]>
Reviewed-By: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd')
| -rw-r--r-- | src/amd/vulkan/si_cmd_buffer.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index 1d2778c2fb7..126cabd390a 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -1359,7 +1359,7 @@ void radv_emit_default_sample_locations(struct radeon_cmdbuf *cs, int nr_samples default: case 1: radeon_set_context_reg_seq(cs, R_028BD4_PA_SC_CENTROID_PRIORITY_0, 2); - radeon_emit(cs, centroid_priority_1x); + radeon_emit(cs, (uint32_t)centroid_priority_1x); radeon_emit(cs, centroid_priority_1x >> 32); radeon_set_context_reg(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs_1x); radeon_set_context_reg(cs, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs_1x); @@ -1368,7 +1368,7 @@ void radv_emit_default_sample_locations(struct radeon_cmdbuf *cs, int nr_samples break; case 2: radeon_set_context_reg_seq(cs, R_028BD4_PA_SC_CENTROID_PRIORITY_0, 2); - radeon_emit(cs, centroid_priority_2x); + radeon_emit(cs, (uint32_t)centroid_priority_2x); radeon_emit(cs, centroid_priority_2x >> 32); radeon_set_context_reg(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs_2x); radeon_set_context_reg(cs, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs_2x); @@ -1377,7 +1377,7 @@ void radv_emit_default_sample_locations(struct radeon_cmdbuf *cs, int nr_samples break; case 4: radeon_set_context_reg_seq(cs, R_028BD4_PA_SC_CENTROID_PRIORITY_0, 2); - radeon_emit(cs, centroid_priority_4x); + radeon_emit(cs, (uint32_t)centroid_priority_4x); radeon_emit(cs, centroid_priority_4x >> 32); radeon_set_context_reg(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs_4x); radeon_set_context_reg(cs, R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs_4x); @@ -1386,7 +1386,7 @@ void radv_emit_default_sample_locations(struct radeon_cmdbuf *cs, int nr_samples break; case 8: radeon_set_context_reg_seq(cs, R_028BD4_PA_SC_CENTROID_PRIORITY_0, 2); - radeon_emit(cs, centroid_priority_8x); + radeon_emit(cs, (uint32_t)centroid_priority_8x); radeon_emit(cs, centroid_priority_8x >> 32); radeon_set_context_reg_seq(cs, R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 14); radeon_emit_array(cs, sample_locs_8x, 4); |