diff options
| author | Dave Airlie <[email protected]> | 2016-11-08 16:22:39 +1000 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2016-11-09 06:05:03 +1000 |
| commit | bafc75b4370bfbec0c91ff6bb4d4972fb37bb22a (patch) | |
| tree | 0e425eaada5ca684a5d2a1a44ac774d1734a0394 /src/amd | |
| parent | bdd48e47c094c03cd0646d1b69af0a95257c6793 (diff) | |
radv: emit correct last export when Z/stencil export is enabled
I was getting a random GPU hang in the renderpass simple tests,
it turns out sometimes radv emitted the wrong thing "last".
This fixes the logic to emit Z/stencil last if they occur,
and not mark a color output as last. Also this relies on the
Z/STENCIL being the first two fragment outputs, which they are
so yay.
Fixes: dEQP-VK.renderpass.simple.color_depth (random hangs)
Cc: "13.0" <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd')
| -rw-r--r-- | src/amd/common/ac_nir_to_llvm.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 745baae01e3..8d364e68141 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -4353,12 +4353,10 @@ handle_fs_outputs_post(struct nir_to_llvm_context *ctx, for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) { LLVMValueRef values[4]; - bool last; + if (!(ctx->output_mask & (1ull << i))) continue; - last = ctx->output_mask <= ((1ull << (i + 1)) - 1); - if (i == FRAG_RESULT_DEPTH) { ctx->shader_info->fs.writes_z = true; depth = to_float(ctx, LLVMBuildLoad(ctx->builder, @@ -4368,10 +4366,14 @@ handle_fs_outputs_post(struct nir_to_llvm_context *ctx, stencil = to_float(ctx, LLVMBuildLoad(ctx->builder, ctx->outputs[radeon_llvm_reg_index_soa(i, 0)], "")); } else { + bool last = false; for (unsigned j = 0; j < 4; j++) values[j] = to_float(ctx, LLVMBuildLoad(ctx->builder, ctx->outputs[radeon_llvm_reg_index_soa(i, j)], "")); + if (!ctx->shader_info->fs.writes_z && !ctx->shader_info->fs.writes_stencil) + last = ctx->output_mask <= ((1ull << (i + 1)) - 1); + si_export_mrt_color(ctx, values, V_008DFC_SQ_EXP_MRT + index, last); index++; } |