summaryrefslogtreecommitdiffstats
path: root/src/amd
diff options
context:
space:
mode:
authorDave Airlie <[email protected]>2016-12-22 10:35:46 +1000
committerDave Airlie <[email protected]>2016-12-23 14:36:50 +1000
commit14737bcdd5cc5ebd6694df82917959bc8badce91 (patch)
tree3bcb85739b9bcad33ef3ee302ed2d4fba530d037 /src/amd
parentd55835b8bdf031ef3c254a9b7ec1776ad348582b (diff)
radv: bump texel offsets to align with radeonsi
it appears from the amdgpu-pro results the hw can do more, but let's just align with radeonsi for now. No CTS regressions. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd')
-rw-r--r--src/amd/vulkan/radv_device.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 7c6dee67318..5f909409161 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -496,10 +496,10 @@ void radv_GetPhysicalDeviceProperties(
.minTexelBufferOffsetAlignment = 1,
.minUniformBufferOffsetAlignment = 4,
.minStorageBufferOffsetAlignment = 4,
- .minTexelOffset = -8,
- .maxTexelOffset = 7,
- .minTexelGatherOffset = -8,
- .maxTexelGatherOffset = 7,
+ .minTexelOffset = -32,
+ .maxTexelOffset = 31,
+ .minTexelGatherOffset = -32,
+ .maxTexelGatherOffset = 31,
.minInterpolationOffset = 0, /* FIXME */
.maxInterpolationOffset = 0, /* FIXME */
.subPixelInterpolationOffsetBits = 0, /* FIXME */