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authorBas Nieuwenhuizen <[email protected]>2017-04-20 22:03:15 +0200
committerBas Nieuwenhuizen <[email protected]>2017-04-21 00:59:02 +0200
commit0e91d8f38c433bead0b26b4bc83a88f27d9f832a (patch)
tree0e0b2d92d0a0beebb5f502cda77d40e2d1cbb012 /src/amd
parent1e21d4227e27c4e2a5446b47bbe122713d26cb33 (diff)
radv: Prefetch compute shader too.
For consistency, doesn't really impact performance. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd')
-rw-r--r--src/amd/vulkan/radv_cmd_buffer.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 958ae6e361e..40e6e432ae7 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -2169,6 +2169,7 @@ radv_emit_compute_pipeline(struct radv_cmd_buffer *cmd_buffer)
va = ws->buffer_get_va(compute_shader->bo);
ws->cs_add_buffer(cmd_buffer->cs, compute_shader->bo, 8);
+ si_cp_dma_prefetch(cmd_buffer, va, compute_shader->code_size);
MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws,
cmd_buffer->cs, 16);