diff options
| author | Samuel Pitoiset <[email protected]> | 2017-12-20 20:55:54 +0100 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2017-12-27 10:24:49 +0100 |
| commit | fc35a071b63a5de62bb54a069ee3a543d23545f8 (patch) | |
| tree | 80924be8455c03416b2237670d689f8e63edfcd3 /src/amd | |
| parent | 3015668cad039994954a9ccce7562a26b046fd73 (diff) | |
amd/common: add declare_vs_input_vgprs() helper
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd')
| -rw-r--r-- | src/amd/common/ac_nir_to_llvm.c | 30 |
1 files changed, 16 insertions, 14 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index f48fa1214b8..03e733f965b 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -724,6 +724,17 @@ radv_define_vs_user_sgprs_phase2(struct nir_to_llvm_context *ctx, } static void +declare_vs_input_vgprs(struct nir_to_llvm_context *ctx, struct arg_info *args) +{ + add_vgpr_argument(args, ctx->ac.i32, &ctx->abi.vertex_id); + if (!ctx->is_gs_copy_shader) { + add_vgpr_argument(args, ctx->ac.i32, &ctx->rel_auto_id); + add_vgpr_argument(args, ctx->ac.i32, &ctx->vs_prim_id); + add_vgpr_argument(args, ctx->ac.i32, &ctx->abi.instance_id); + } +} + +static void declare_tes_input_vgprs(struct nir_to_llvm_context *ctx, struct arg_info *args) { add_vgpr_argument(args, ctx->ac.f32, &ctx->tes_u); @@ -777,12 +788,8 @@ static void create_function(struct nir_to_llvm_context *ctx, add_sgpr_argument(&args, ctx->ac.i32, &ctx->es2gs_offset); // es2gs offset else if (ctx->options->key.vs.as_ls) add_user_sgpr_argument(&args, ctx->ac.i32, &ctx->ls_out_layout); // ls out layout - add_vgpr_argument(&args, ctx->ac.i32, &ctx->abi.vertex_id); // vertex id - if (!ctx->is_gs_copy_shader) { - add_vgpr_argument(&args, ctx->ac.i32, &ctx->rel_auto_id); // rel auto id - add_vgpr_argument(&args, ctx->ac.i32, &ctx->vs_prim_id); // vs prim id - add_vgpr_argument(&args, ctx->ac.i32, &ctx->abi.instance_id); // instance id - } + + declare_vs_input_vgprs(ctx, &args); break; case MESA_SHADER_TESS_CTRL: if (has_previous_stage) { @@ -808,10 +815,8 @@ static void create_function(struct nir_to_llvm_context *ctx, add_vgpr_argument(&args, ctx->ac.i32, &ctx->tcs_patch_id); // patch id add_vgpr_argument(&args, ctx->ac.i32, &ctx->tcs_rel_ids); // rel ids; - add_vgpr_argument(&args, ctx->ac.i32, &ctx->abi.vertex_id); // vertex id - add_vgpr_argument(&args, ctx->ac.i32, &ctx->rel_auto_id); // rel auto id - add_vgpr_argument(&args, ctx->ac.i32, &ctx->vs_prim_id); // vs prim id - add_vgpr_argument(&args, ctx->ac.i32, &ctx->abi.instance_id); // instance id + + declare_vs_input_vgprs(ctx, &args); } else { radv_define_common_user_sgprs_phase1(ctx, stage, has_previous_stage, previous_stage, &user_sgpr_info, &args, &desc_sets); add_user_sgpr_argument(&args, ctx->ac.i32, &ctx->tcs_offchip_layout); // tcs offchip layout @@ -869,10 +874,7 @@ static void create_function(struct nir_to_llvm_context *ctx, add_vgpr_argument(&args, ctx->ac.i32, &ctx->gs_vtx_offset[4]); if (previous_stage == MESA_SHADER_VERTEX) { - add_vgpr_argument(&args, ctx->ac.i32, &ctx->abi.vertex_id); // vertex id - add_vgpr_argument(&args, ctx->ac.i32, &ctx->rel_auto_id); // rel auto id - add_vgpr_argument(&args, ctx->ac.i32, &ctx->vs_prim_id); // vs prim id - add_vgpr_argument(&args, ctx->ac.i32, &ctx->abi.instance_id); // instance id + declare_vs_input_vgprs(ctx, &args); } else { declare_tes_input_vgprs(ctx, &args); } |