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authorSamuel Pitoiset <[email protected]>2018-08-30 09:35:41 +0200
committerSamuel Pitoiset <[email protected]>2018-08-31 17:34:41 +0200
commitffe3a2a298da78d68742d3683109b5cd8e13c656 (patch)
tree109e6af355e485bd8d7e745641474f99b749c236 /src/amd
parent6f47df312943b05653efc0494551ebf8c3903d43 (diff)
radv: add set_output_usage_mask() helper
Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd')
-rw-r--r--src/amd/vulkan/radv_shader_info.c43
1 files changed, 26 insertions, 17 deletions
diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c
index a45c847c46c..5925fd924c8 100644
--- a/src/amd/vulkan/radv_shader_info.c
+++ b/src/amd/vulkan/radv_shader_info.c
@@ -115,6 +115,26 @@ gather_intrinsic_load_deref_info(const nir_shader *nir,
}
static void
+set_output_usage_mask(const nir_shader *nir, const nir_intrinsic_instr *instr,
+ uint8_t *output_usage_mask)
+{
+ nir_deref_instr *deref_instr =
+ nir_instr_as_deref(instr->src[0].ssa->parent_instr);
+ nir_variable *var = nir_deref_instr_get_variable(deref_instr);
+ unsigned attrib_count = glsl_count_attribute_slots(var->type, false);
+ unsigned idx = var->data.location;
+ unsigned comp = var->data.location_frac;
+ unsigned const_offset = 0;
+
+ get_deref_offset(deref_instr, &const_offset);
+
+ for (unsigned i = 0; i < attrib_count; i++) {
+ output_usage_mask[idx + i + const_offset] |=
+ instr->const_index[0] << comp;
+ }
+}
+
+static void
gather_intrinsic_store_deref_info(const nir_shader *nir,
const nir_intrinsic_instr *instr,
struct radv_shader_info *info)
@@ -122,31 +142,20 @@ gather_intrinsic_store_deref_info(const nir_shader *nir,
nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
if (var->data.mode == nir_var_shader_out) {
- unsigned attrib_count = glsl_count_attribute_slots(var->type, false);
unsigned idx = var->data.location;
- unsigned comp = var->data.location_frac;
- unsigned const_offset = 0;
-
- get_deref_offset(nir_instr_as_deref(instr->src[0].ssa->parent_instr), &const_offset);
switch (nir->info.stage) {
case MESA_SHADER_VERTEX:
- for (unsigned i = 0; i < attrib_count; i++) {
- info->vs.output_usage_mask[idx + i + const_offset] |=
- instr->const_index[0] << comp;
- }
+ set_output_usage_mask(nir, instr,
+ info->vs.output_usage_mask);
break;
case MESA_SHADER_GEOMETRY:
- for (unsigned i = 0; i < attrib_count; i++) {
- info->gs.output_usage_mask[idx + i + const_offset] |=
- instr->const_index[0] << comp;
- }
+ set_output_usage_mask(nir, instr,
+ info->gs.output_usage_mask);
break;
case MESA_SHADER_TESS_EVAL:
- for (unsigned i = 0; i < attrib_count; i++) {
- info->tes.output_usage_mask[idx + i + const_offset] |=
- instr->const_index[0] << comp;
- }
+ set_output_usage_mask(nir, instr,
+ info->tes.output_usage_mask);
break;
case MESA_SHADER_TESS_CTRL: {
unsigned param = shader_io_get_unique_index(idx);