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authorSamuel Pitoiset <[email protected]>2018-04-05 10:27:07 +0200
committerSamuel Pitoiset <[email protected]>2018-04-06 09:07:31 +0200
commitd53dff3bfced4cf573c558ca8873af63a66cd014 (patch)
treedbc68636bf96cbcc4c63a372895dcf25a0a1adcd /src/amd
parentc5b87c94d8e3bc4b11a2cd0e9f4acabe9515e4cb (diff)
radv: enable the Polaris small primitive filter control
Enable it directly in the preamble, but do not enable line on Polaris10/11/12 because there is a hw bug. There is possibly an issue when MSAA is off, but this doesn't regress any CTS and AMDVLK doesn't have a workaround as well. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd')
-rw-r--r--src/amd/vulkan/si_cmd_buffer.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
index 0970eff1039..aed291be35d 100644
--- a/src/amd/vulkan/si_cmd_buffer.c
+++ b/src/amd/vulkan/si_cmd_buffer.c
@@ -539,6 +539,21 @@ si_emit_config(struct radv_physical_device *physical_device,
S_028004_ZPASS_INCREMENT_DISABLE(1));
}
+ /* Enable the Polaris small primitive filter control.
+ * XXX: There is possibly an issue when MSAA is off (see RadeonSI
+ * has_msaa_sample_loc_bug). But this doesn't seem to regress anything,
+ * and AMDVLK doesn't have a workaround as well.
+ */
+ if (physical_device->rad_info.family >= CHIP_POLARIS10) {
+ unsigned small_prim_filter_cntl =
+ S_028830_SMALL_PRIM_FILTER_ENABLE(1) |
+ /* Workaround for a hw line bug. */
+ S_028830_LINE_FILTER_DISABLE(physical_device->rad_info.family <= CHIP_POLARIS12);
+
+ radeon_set_context_reg(cs, R_028830_PA_SU_SMALL_PRIM_FILTER_CNTL,
+ small_prim_filter_cntl);
+ }
+
si_emit_compute(physical_device, cs);
}