diff options
| author | Bas Nieuwenhuizen <[email protected]> | 2018-10-23 10:54:24 +0200 |
|---|---|---|
| committer | Bas Nieuwenhuizen <[email protected]> | 2018-10-25 16:17:54 +0200 |
| commit | d41c3cc01314fd2586ad2392a05647197d04c28d (patch) | |
| tree | a41ba6ce58432f50a0dfc288af847b7f4695d428 /src/amd | |
| parent | 9d40ec2cf6ec6d3d9d78deead9f334523843fa48 (diff) | |
radv: Emit enqueued pipeline barriers on event write.
Since the CPU can read them we need to execute any GPU->CPU
flushes before the event is written.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108524
Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver"
Reviewed-by: Samuel Pitoiset <[email protected]>
Diffstat (limited to 'src/amd')
| -rw-r--r-- | src/amd/vulkan/radv_cmd_buffer.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 339704990e2..e21aaa9535d 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -4337,6 +4337,8 @@ static void write_event(struct radv_cmd_buffer *cmd_buffer, struct radeon_cmdbuf *cs = cmd_buffer->cs; uint64_t va = radv_buffer_get_va(event->bo); + si_emit_cache_flush(cmd_buffer); + radv_cs_add_buffer(cmd_buffer->device->ws, cs, event->bo); MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, cs, 18); |