diff options
| author | Fredrik Höglund <[email protected]> | 2017-10-19 20:54:50 +0200 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2017-10-20 11:37:51 +0200 |
| commit | e2053b8e3d45af48f35973ddb55993353b597753 (patch) | |
| tree | 234acbae0bb441e1386fd2627560fc8541d68ff7 /src/amd | |
| parent | 565c22158fce0960fde6ad8d794f8e1091b90292 (diff) | |
radv: don't flush the VS when srcStageMask == TOP_OF_PIPE_BIT
The Vulkan specification says:
"... an execution dependency with only VK_PIPELINE_STAGE_TOP_OF_-
PIPE_BIT in the source stage mask will effectively not wait for
any prior commands to complete."
Signed-off-by: Fredrik Höglund <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Reviewed-by: Samuel Pitoiset <[email protected]>
Diffstat (limited to 'src/amd')
| -rw-r--r-- | src/amd/vulkan/radv_cmd_buffer.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 2d59e475639..ac76d887060 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -1849,8 +1849,7 @@ static void radv_stage_flush(struct radv_cmd_buffer *cmd_buffer, VK_PIPELINE_STAGE_ALL_GRAPHICS_BIT | VK_PIPELINE_STAGE_ALL_COMMANDS_BIT)) { cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_PS_PARTIAL_FLUSH; - } else if (src_stage_mask & (VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT | - VK_PIPELINE_STAGE_DRAW_INDIRECT_BIT | + } else if (src_stage_mask & (VK_PIPELINE_STAGE_DRAW_INDIRECT_BIT | VK_PIPELINE_STAGE_VERTEX_INPUT_BIT | VK_PIPELINE_STAGE_VERTEX_SHADER_BIT)) { cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_VS_PARTIAL_FLUSH; |