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authorIlia Mirkin <[email protected]>2018-04-21 13:08:51 -0400
committerIlia Mirkin <[email protected]>2018-04-24 21:37:44 -0400
commitc17ddcb4b4240542832fba72b5810039dd245fc9 (patch)
tree8e075d14eaf5b647d739243a5f0230d238ef2c9b /src/amd
parent6695f9d5c5c94df080efc720ed532217618a28c3 (diff)
nvc0/ir: all short immediates are sign-extended, adjust LIMM test
Some analysis suggests that all short immediates are sign-extended. The insnCanLoad logic already accounted for this, but we could still pick the wrong form when emitting actual instructions that support both short and long immediates (with the long form usually having additional restrictions that insnCanLoad should be aware of). This also reverses a bunch of commits that had previously "worked around" this issue in various emitters: 9c63224540ef: gm107/ir: make use of ADD32I for all immediates 83a4f28dc27b: gm107/ir: make use of LOP32I for all immediates b84c97587b4a: gm107/ir: make use of IMUL32I for all immediates d30768025a22: gk110/ir: make use of IMUL32I for all immediates as well as the original import for UMUL in the nvc0 emitter. Reported-by: Karol Herbst <[email protected]> Signed-off-by: Ilia Mirkin <[email protected]> Tested-by: Karol Herbst <[email protected]>
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