diff options
| author | Dave Airlie <[email protected]> | 2017-10-19 05:29:02 +0100 |
|---|---|---|
| committer | Bas Nieuwenhuizen <[email protected]> | 2017-10-20 01:50:40 +0200 |
| commit | 1dda214d9c8f22081448cca64d2ad8876f2f1d94 (patch) | |
| tree | e05fc9a7f3447f665aee4ae2652ce5ea32c20e02 /src/amd | |
| parent | 14978a1c3bd9dececb135c5d4de73779c26576fb (diff) | |
ac/nir: init full exec mask for merged shaders.
Signed-off-by: Bas Nieuwenhuizen <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd')
| -rw-r--r-- | src/amd/common/ac_llvm_build.c | 8 | ||||
| -rw-r--r-- | src/amd/common/ac_llvm_build.h | 1 | ||||
| -rw-r--r-- | src/amd/common/ac_nir_to_llvm.c | 3 |
3 files changed, 12 insertions, 0 deletions
diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index 949f181aace..e5cd23e0251 100644 --- a/src/amd/common/ac_llvm_build.c +++ b/src/amd/common/ac_llvm_build.c @@ -1734,3 +1734,11 @@ void ac_optimize_vs_outputs(struct ac_llvm_context *ctx, *num_param_exports = exports.num; } } + +void ac_init_exec_full_mask(struct ac_llvm_context *ctx) +{ + LLVMValueRef full_mask = LLVMConstInt(ctx->i64, ~0ull, 0); + ac_build_intrinsic(ctx, + "llvm.amdgcn.init.exec", ctx->voidt, + &full_mask, 1, AC_FUNC_ATTR_CONVERGENT); +} diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h index f0b5875b423..aa2a2899ab4 100644 --- a/src/amd/common/ac_llvm_build.h +++ b/src/amd/common/ac_llvm_build.h @@ -281,6 +281,7 @@ void ac_optimize_vs_outputs(struct ac_llvm_context *ac, uint8_t *vs_output_param_offset, uint32_t num_outputs, uint8_t *num_param_exports); +void ac_init_exec_full_mask(struct ac_llvm_context *ctx); #ifdef __cplusplus } #endif diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 44de834bd86..0e1c65ae813 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -6488,6 +6488,9 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm, ctx.abi.load_ssbo = radv_load_ssbo; ctx.abi.load_sampler_desc = radv_get_sampler_desc; + if (shader_count >= 2) + ac_init_exec_full_mask(&ctx.ac); + if (ctx.ac.chip_class == GFX9 && shaders[shader_count - 1]->stage == MESA_SHADER_TESS_CTRL) ac_nir_fixup_ls_hs_input_vgprs(&ctx); |