diff options
author | Samuel Pitoiset <[email protected]> | 2019-08-02 12:13:20 +0200 |
---|---|---|
committer | Samuel Pitoiset <[email protected]> | 2019-08-27 08:04:11 +0200 |
commit | c08401f0353e941691a5f40945cbdd04030a94c7 (patch) | |
tree | 8b2d2aecae0494fb53671abc34f97c0a35e14641 /src/amd | |
parent | d62d2840c42d0eb3433c6c0c8bfe8d506c0475b9 (diff) |
ac: add has_distributed_tess to ac_gpu_info
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/amd')
-rw-r--r-- | src/amd/common/ac_gpu_info.c | 3 | ||||
-rw-r--r-- | src/amd/common/ac_gpu_info.h | 1 | ||||
-rw-r--r-- | src/amd/vulkan/radv_device.c | 3 | ||||
-rw-r--r-- | src/amd/vulkan/radv_pipeline.c | 4 | ||||
-rw-r--r-- | src/amd/vulkan/radv_private.h | 1 |
5 files changed, 6 insertions, 6 deletions
diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c index ed6e273c598..a3f1afe1f04 100644 --- a/src/amd/common/ac_gpu_info.c +++ b/src/amd/common/ac_gpu_info.c @@ -447,6 +447,9 @@ bool ac_query_gpu_info(int fd, void *dev_p, */ info->has_clear_state = info->chip_class >= GFX7; + info->has_distributed_tess = info->chip_class >= GFX8 && + info->max_se >= 2; + /* Get the number of good compute units. */ info->num_good_compute_units = 0; for (i = 0; i < info->max_se; i++) diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h index 69bac7252bf..9ce1650c03c 100644 --- a/src/amd/common/ac_gpu_info.h +++ b/src/amd/common/ac_gpu_info.h @@ -59,6 +59,7 @@ struct radeon_info { uint32_t clock_crystal_freq; uint32_t tcc_cache_line_size; bool has_clear_state; + bool has_distributed_tess; /* There are 2 display DCC codepaths, because display expects unaligned DCC. */ /* Disable RB and pipe alignment to skip the retile blit. (1 RB chips only) */ diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index ca484fcc0fc..ad5c104f44f 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -2005,9 +2005,6 @@ VkResult radv_CreateDevice( device->tess_offchip_block_dw_size = device->physical_device->rad_info.family == CHIP_HAWAII ? 4096 : 8192; - device->has_distributed_tess = - device->physical_device->rad_info.chip_class >= GFX8 && - device->physical_device->rad_info.max_se >= 2; if (getenv("RADV_TRACE_FILE")) { const char *filename = getenv("RADV_TRACE_FILE"); diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index e43b77b192e..584dddb48df 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -2010,7 +2010,7 @@ calculate_tess_state(struct radv_pipeline *pipeline, else topology = V_028B6C_OUTPUT_TRIANGLE_CW; - if (pipeline->device->has_distributed_tess) { + if (pipeline->device->physical_device->rad_info.has_distributed_tess) { if (pipeline->device->physical_device->rad_info.family == CHIP_FIJI || pipeline->device->physical_device->rad_info.family >= CHIP_POLARIS10) distribution_mode = V_028B6C_DISTRIBUTION_MODE_TRAPEZOIDS; @@ -4378,7 +4378,7 @@ radv_compute_ia_multi_vgt_param_helpers(struct radv_pipeline *pipeline, radv_pipeline_has_gs(pipeline)) ia_multi_vgt_param.partial_vs_wave = true; /* Needed for 028B6C_DISTRIBUTION_MODE != 0 */ - if (device->has_distributed_tess) { + if (device->physical_device->rad_info.has_distributed_tess) { if (radv_pipeline_has_gs(pipeline)) { if (device->physical_device->rad_info.chip_class <= GFX8) ia_multi_vgt_param.partial_es_wave = true; diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index 39d349b723c..287c2abfa3f 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -704,7 +704,6 @@ struct radv_device { struct radeon_cmdbuf *empty_cs[RADV_MAX_QUEUE_FAMILIES]; bool always_use_syncobj; - bool has_distributed_tess; bool pbb_allowed; bool dfsm_allowed; uint32_t tess_offchip_block_dw_size; |