diff options
| author | Samuel Pitoiset <[email protected]> | 2019-06-25 14:13:36 +0200 |
|---|---|---|
| committer | Bas Nieuwenhuizen <[email protected]> | 2019-07-07 17:51:32 +0200 |
| commit | b1b60a92b17e18f55c4d176e0b8445b6f486379a (patch) | |
| tree | b181f118dbec4e768377c8daf52a88db19de383f /src/amd | |
| parent | 12a42c2d9f1470674992c7280705e1b1359536b3 (diff) | |
radv/gfx10: initialize GE_{MAX,MIN}_VTX_INDX/INDX_OFFSET
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd')
| -rw-r--r-- | src/amd/vulkan/si_cmd_buffer.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index a3ed09a157c..fbef80990f4 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -237,7 +237,11 @@ si_emit_graphics(struct radv_physical_device *physical_device, S_02800C_FORCE_HIS_ENABLE0(V_02800C_FORCE_DISABLE) | S_02800C_FORCE_HIS_ENABLE1(V_02800C_FORCE_DISABLE)); - if (physical_device->rad_info.chip_class >= GFX9) { + if (physical_device->rad_info.chip_class >= GFX10) { + radeon_set_uconfig_reg(cs, R_030964_GE_MAX_VTX_INDX, ~0); + radeon_set_uconfig_reg(cs, R_030924_GE_MIN_VTX_INDX, 0); + radeon_set_uconfig_reg(cs, R_030928_GE_INDX_OFFSET, 0); + } else if (physical_device->rad_info.chip_class >= GFX9) { radeon_set_uconfig_reg(cs, R_030920_VGT_MAX_VTX_INDX, ~0); radeon_set_uconfig_reg(cs, R_030924_VGT_MIN_VTX_INDX, 0); radeon_set_uconfig_reg(cs, R_030928_VGT_INDX_OFFSET, 0); |