diff options
author | Samuel Pitoiset <[email protected]> | 2018-03-21 21:30:41 +0100 |
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committer | Samuel Pitoiset <[email protected]> | 2018-03-23 10:05:55 +0100 |
commit | 5ae97722450dd818fb019b1e4727b3e2a44e1ed1 (patch) | |
tree | 9fc660fb7bac79473cabe20132d3bd009fb3acd6 /src/amd | |
parent | 9b8e75bee3291f68c36e68c07a7d19316cd6d080 (diff) |
radv: add radv_calc_decompress_on_z_planes() helper
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd')
-rw-r--r-- | src/amd/vulkan/radv_device.c | 51 |
1 files changed, 37 insertions, 14 deletions
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 36ba0c3833d..22500bfc130 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -3597,6 +3597,35 @@ radv_initialise_color_surface(struct radv_device *device, } } +static unsigned +radv_calc_decompress_on_z_planes(struct radv_device *device, + struct radv_image_view *iview) +{ + unsigned max_zplanes = 0; + + assert(iview->image->tc_compatible_htile); + + if (device->physical_device->rad_info.chip_class >= GFX9) { + /* Default value for 32-bit depth surfaces. */ + max_zplanes = 4; + + if (iview->vk_format == VK_FORMAT_D16_UNORM && + iview->image->info.samples > 1) + max_zplanes = 2; + + max_zplanes = max_zplanes + 1; + } else { + if (iview->image->info.samples <= 1) + max_zplanes = 5; + else if (iview->image->info.samples <= 4) + max_zplanes = 3; + else + max_zplanes = 2; + } + + return max_zplanes; +} + static void radv_initialise_ds_surface(struct radv_device *device, struct radv_ds_buffer_info *ds, @@ -3667,14 +3696,11 @@ radv_initialise_ds_surface(struct radv_device *device, ds->db_z_info |= S_028038_TILE_SURFACE_ENABLE(1); if (iview->image->tc_compatible_htile) { - unsigned max_zplanes = 4; - - if (iview->vk_format == VK_FORMAT_D16_UNORM && - iview->image->info.samples > 1) - max_zplanes = 2; + unsigned max_zplanes = + radv_calc_decompress_on_z_planes(device, iview); - ds->db_z_info |= S_028038_DECOMPRESS_ON_N_ZPLANES(max_zplanes + 1) | - S_028038_ITERATE_FLUSH(1); + ds->db_z_info |= S_028038_DECOMPRESS_ON_N_ZPLANES(max_zplanes) | + S_028038_ITERATE_FLUSH(1); ds->db_stencil_info |= S_02803C_ITERATE_FLUSH(1); } @@ -3752,14 +3778,11 @@ radv_initialise_ds_surface(struct radv_device *device, ds->db_htile_surface = S_028ABC_FULL_CACHE(1); if (iview->image->tc_compatible_htile) { - ds->db_htile_surface |= S_028ABC_TC_COMPATIBLE(1); + unsigned max_zplanes = + radv_calc_decompress_on_z_planes(device, iview); - if (iview->image->info.samples <= 1) - ds->db_z_info |= S_028040_DECOMPRESS_ON_N_ZPLANES(5); - else if (iview->image->info.samples <= 4) - ds->db_z_info |= S_028040_DECOMPRESS_ON_N_ZPLANES(3); - else - ds->db_z_info|= S_028040_DECOMPRESS_ON_N_ZPLANES(2); + ds->db_htile_surface |= S_028ABC_TC_COMPATIBLE(1); + ds->db_z_info |= S_028040_DECOMPRESS_ON_N_ZPLANES(max_zplanes); } } } |