diff options
| author | Daniel Schürmann <[email protected]> | 2019-11-08 13:37:15 +0100 |
|---|---|---|
| committer | Daniel Schürmann <[email protected]> | 2019-12-07 11:23:11 +0100 |
| commit | 1c4afe38f2e29940aab10c69b6f56784dcb46be3 (patch) | |
| tree | 91a8275324b3da155581421eeef2852370d26e77 /src/amd | |
| parent | 1e1356b2ad2500e8aeefb8c3b64575ccac685eca (diff) | |
aco: implement 64bit ine/ieq for SI/CI
Reviewed-by: Rhys Perry <[email protected]>
Diffstat (limited to 'src/amd')
| -rw-r--r-- | src/amd/compiler/aco_instruction_selection.cpp | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index 82b6989bb72..0e62d22aa68 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -565,17 +565,17 @@ void emit_sopc_instruction(isel_context *ctx, nir_alu_instr *instr, aco_opcode o } void emit_comparison(isel_context *ctx, nir_alu_instr *instr, Temp dst, - aco_opcode v32_op, aco_opcode v64_op, aco_opcode s32_op = aco_opcode::last_opcode, aco_opcode s64_op = aco_opcode::last_opcode) + aco_opcode v32_op, aco_opcode v64_op, aco_opcode s32_op = aco_opcode::num_opcodes, aco_opcode s64_op = aco_opcode::num_opcodes) { aco_opcode s_op = instr->src[0].src.ssa->bit_size == 64 ? s64_op : s32_op; aco_opcode v_op = instr->src[0].src.ssa->bit_size == 64 ? v64_op : v32_op; bool divergent_vals = ctx->divergent_vals[instr->dest.dest.ssa.index]; - bool use_valu = s_op == aco_opcode::last_opcode || + bool use_valu = s_op == aco_opcode::num_opcodes || divergent_vals || ctx->allocated[instr->src[0].src.ssa->index].type() == RegType::vgpr || ctx->allocated[instr->src[1].src.ssa->index].type() == RegType::vgpr; aco_opcode op = use_valu ? v_op : s_op; - assert(op != aco_opcode::last_opcode); + assert(op != aco_opcode::num_opcodes); if (use_valu) emit_vopc_instruction(ctx, instr, op, dst); @@ -2374,14 +2374,16 @@ void visit_alu_instr(isel_context *ctx, nir_alu_instr *instr) if (instr->src[0].src.ssa->bit_size == 1) emit_boolean_logic(ctx, instr, Builder::s_xnor, dst); else - emit_comparison(ctx, instr, dst, aco_opcode::v_cmp_eq_i32, aco_opcode::v_cmp_eq_i64, aco_opcode::s_cmp_eq_i32, aco_opcode::s_cmp_eq_u64); + emit_comparison(ctx, instr, dst, aco_opcode::v_cmp_eq_i32, aco_opcode::v_cmp_eq_i64, aco_opcode::s_cmp_eq_i32, + ctx->program->chip_class >= GFX8 ? aco_opcode::s_cmp_eq_u64 : aco_opcode::num_opcodes); break; } case nir_op_ine: { if (instr->src[0].src.ssa->bit_size == 1) emit_boolean_logic(ctx, instr, Builder::s_xor, dst); else - emit_comparison(ctx, instr, dst, aco_opcode::v_cmp_lg_i32, aco_opcode::v_cmp_lg_i64, aco_opcode::s_cmp_lg_i32, aco_opcode::s_cmp_lg_u64); + emit_comparison(ctx, instr, dst, aco_opcode::v_cmp_lg_i32, aco_opcode::v_cmp_lg_i64, aco_opcode::s_cmp_lg_i32, + ctx->program->chip_class >= GFX8 ? aco_opcode::s_cmp_lg_u64 : aco_opcode::num_opcodes); break; } case nir_op_ult: { |