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authorDave Airlie <[email protected]>2017-06-05 01:54:52 +0100
committerDave Airlie <[email protected]>2017-07-21 21:31:54 +0100
commit80562f2b77bfff224cb469ef475912222e5d8a9c (patch)
tree35016d8bb7cab2a7dac12cd47c017c1953cc150d /src/amd
parent3e03ecaaf698418714764da76fb7d29ea158e0dd (diff)
ac/gpu: add code to detect if kernel supports sync objects.
Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd')
-rw-r--r--src/amd/common/ac_gpu_info.c9
-rw-r--r--src/amd/common/ac_gpu_info.h1
2 files changed, 10 insertions, 0 deletions
diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index ced7183cf64..929dfd2946f 100644
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -84,6 +84,14 @@ static unsigned cik_get_num_tile_pipes(struct amdgpu_gpu_info *info)
}
}
+static bool has_syncobj(int fd)
+{
+ uint64_t value;
+ if (drmGetCap(fd, DRM_CAP_SYNCOBJ, &value))
+ return false;
+ return value ? true : false;
+}
+
bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
struct radeon_info *info,
struct amdgpu_gpu_info *amdinfo)
@@ -258,6 +266,7 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
info->vce_fw_version =
vce.available_rings ? vce_version : 0;
info->has_userptr = true;
+ info->has_syncobj = has_syncobj(fd);
info->num_render_backends = amdinfo->rb_pipes;
info->clock_crystal_freq = amdinfo->gpu_counter_freq;
if (!info->clock_crystal_freq) {
diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h
index 72a85062466..20907c2620f 100644
--- a/src/amd/common/ac_gpu_info.h
+++ b/src/amd/common/ac_gpu_info.h
@@ -76,6 +76,7 @@ struct radeon_info {
uint32_t drm_minor;
uint32_t drm_patchlevel;
bool has_userptr;
+ bool has_syncobj;
/* Shader cores. */
uint32_t r600_max_quad_pipes; /* wave size / 16 */