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authorSamuel Pitoiset <[email protected]>2019-07-18 15:51:30 +0200
committerSamuel Pitoiset <[email protected]>2019-07-22 09:02:31 +0200
commit1fb7bd046b32d2e169e70e6d42f86b9b077590a8 (patch)
tree9a5f9767890ae81fd79e66c002688655de2247ba /src/amd
parent1878090b687fb4d76de7ba0dba5fd939bd87039e (diff)
radv/gfx10: do not set ELEMENT_SIZE for buffer descriptors
This field doesn't exist. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd')
-rw-r--r--src/amd/vulkan/radv_device.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 626a24c1894..992e12840f7 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -2161,7 +2161,6 @@ fill_geom_tess_rings(struct radv_queue *queue,
S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) |
S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W) |
- S_008F0C_ELEMENT_SIZE(1) |
S_008F0C_INDEX_STRIDE(3) |
S_008F0C_ADD_TID_ENABLE(1);
@@ -2171,7 +2170,8 @@ fill_geom_tess_rings(struct radv_queue *queue,
S_008F0C_RESOURCE_LEVEL(1);
} else {
desc[3] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
- S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32);
+ S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32) |
+ S_008F0C_ELEMENT_SIZE(1);
}
/* GS entry for ES->GS ring */
@@ -2231,7 +2231,6 @@ fill_geom_tess_rings(struct radv_queue *queue,
S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) |
S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W) |
- S_008F0C_ELEMENT_SIZE(1) |
S_008F0C_INDEX_STRIDE(1) |
S_008F0C_ADD_TID_ENABLE(true);
@@ -2241,7 +2240,8 @@ fill_geom_tess_rings(struct radv_queue *queue,
S_008F0C_RESOURCE_LEVEL(1);
} else {
desc[7] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
- S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32);
+ S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32) |
+ S_008F0C_ELEMENT_SIZE(1);
}
}