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authorDave Airlie <[email protected]>2017-08-04 07:12:03 +0100
committerDave Airlie <[email protected]>2017-08-04 07:13:40 +0100
commitfc625ba0727c7f72ac73ff6e457650476553908e (patch)
tree333f9feb7ec79611da4eda87b32484695b16f185 /src/amd
parenta6b4f04d9bd746264629b9ecfc6f85faab433711 (diff)
radv: also fix texture image descriptors for mipmap tile swizzle
This fixes the image descriptors for mipmapped tile swizzle Fixes: 2b7e8556 (ac/surface: enable tile swizzle for mipmapped textures) Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd')
-rw-r--r--src/amd/vulkan/radv_image.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index 8456d3ab1f6..c27c3b6ddc6 100644
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -217,7 +217,8 @@ si_set_mutable_tex_desc_fields(struct radv_device *device,
state[0] = va >> 8;
if (chip_class < GFX9)
- state[0] |= image->surface.tile_swizzle;
+ if (base_level_info->mode == RADEON_SURF_MODE_2D)
+ state[0] |= image->surface.tile_swizzle;
state[1] &= C_008F14_BASE_ADDRESS_HI;
state[1] |= S_008F14_BASE_ADDRESS_HI(va >> 40);
state[3] |= S_008F1C_TILING_INDEX(si_tile_mode_index(image, base_level,