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authorDave Airlie <[email protected]>2018-02-06 19:37:48 +0000
committerDave Airlie <[email protected]>2018-02-06 19:56:00 +0000
commite7e81f362d6dc4fe3a272cdd07724a26391e8f5e (patch)
tree5f2da91f460d70b0ac7fd703991eff35eb9e5cd5 /src/amd
parent4081e088962315b5c3f4e7030868faf01e7c4a69 (diff)
radv: don't support tc-compat on multisample d32s8 at all.
RX550 fails dEQP-VK.renderpass.suballocation.multisample.d32_sfloat_s8_uint.samples_2 So increase the range of the workaround. Fixes: f4c534ef6 (radv: don't enable tc compat for d32s8 + 4/8 samples (v1.1)) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd')
-rw-r--r--src/amd/vulkan/radv_image.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index b4de7255c7b..5ac0f72589d 100644
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -116,8 +116,8 @@ radv_init_surface(struct radv_device *device,
pCreateInfo->mipLevels <= 1 &&
device->physical_device->rad_info.chip_class >= VI &&
((pCreateInfo->format == VK_FORMAT_D32_SFLOAT ||
- /* for some reason TC compat with 4/8 samples breaks some cts tests - disable for now */
- (pCreateInfo->samples < 4 && pCreateInfo->format == VK_FORMAT_D32_SFLOAT_S8_UINT)) ||
+ /* for some reason TC compat with 2/4/8 samples breaks some cts tests - disable for now */
+ (pCreateInfo->samples < 2 && pCreateInfo->format == VK_FORMAT_D32_SFLOAT_S8_UINT)) ||
(device->physical_device->rad_info.chip_class >= GFX9 &&
pCreateInfo->format == VK_FORMAT_D16_UNORM)))
surface->flags |= RADEON_SURF_TC_COMPATIBLE_HTILE;