diff options
author | Bas Nieuwenhuizen <[email protected]> | 2019-08-16 01:13:00 +0200 |
---|---|---|
committer | Bas Nieuwenhuizen <[email protected]> | 2019-08-16 01:22:54 +0200 |
commit | b9fb90e6d35b19a68a163ab28fba87ab2a950e89 (patch) | |
tree | 84518816b776c4596ef35e47f7a8eede97dd4f71 /src/amd | |
parent | b4dad3afaa070272aae3a7091f96afbaf99eacc1 (diff) |
Revert "radv/gfx10: Enable DCC for storage images."
Quite useless without DCC for LAYOUT_GENERAL.
Fixes: b4dad3afaa0 Revert "radv: Do not decompress on LAYOUT_GENERAL."
Acked-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd')
-rw-r--r-- | src/amd/vulkan/radv_debug.h | 1 | ||||
-rw-r--r-- | src/amd/vulkan/radv_device.c | 1 | ||||
-rw-r--r-- | src/amd/vulkan/radv_image.c | 20 |
3 files changed, 4 insertions, 18 deletions
diff --git a/src/amd/vulkan/radv_debug.h b/src/amd/vulkan/radv_debug.h index a4878b06bdc..ef5b331d188 100644 --- a/src/amd/vulkan/radv_debug.h +++ b/src/amd/vulkan/radv_debug.h @@ -67,7 +67,6 @@ enum { RADV_PERFTEST_CS_WAVE_32 = 0x100, RADV_PERFTEST_PS_WAVE_32 = 0x200, RADV_PERFTEST_GE_WAVE_32 = 0x400, - RADV_PERFTEST_STORAGE_DCC = 0x800, }; bool diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index c59a7464198..05d09bb08eb 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -514,7 +514,6 @@ static const struct debug_control radv_perftest_options[] = { {"cswave32", RADV_PERFTEST_CS_WAVE_32}, {"pswave32", RADV_PERFTEST_PS_WAVE_32}, {"gewave32", RADV_PERFTEST_GE_WAVE_32}, - {"storagedcc", RADV_PERFTEST_STORAGE_DCC}, {NULL, 0} }; diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index 27843853af0..34eb672d6ac 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -143,13 +143,6 @@ radv_surface_has_scanout(struct radv_device *device, const struct radv_image_cre } static bool -radv_support_storage_dcc(const struct radv_physical_device *pdevice) -{ - return pdevice->rad_info.chip_class >= GFX10 && - (pdevice->instance->perftest_flags & RADV_PERFTEST_STORAGE_DCC); -} - -static bool radv_use_dcc_for_image(struct radv_device *device, const struct radv_image *image, const struct radv_image_create_info *create_info, @@ -168,8 +161,8 @@ radv_use_dcc_for_image(struct radv_device *device, if (image->shareable) return false; - if (((pCreateInfo->usage & VK_IMAGE_USAGE_STORAGE_BIT) && - !radv_support_storage_dcc(device->physical_device))|| + /* TODO: Enable DCC for storage images. */ + if ((pCreateInfo->usage & VK_IMAGE_USAGE_STORAGE_BIT) || (pCreateInfo->flags & VK_IMAGE_CREATE_EXTENDED_USAGE_BIT)) return false; @@ -1451,17 +1444,13 @@ radv_image_view_make_descriptor(struct radv_image_view *iview, else base_level_info = &plane->surface.u.legacy.level[iview->base_mip]; } - - if (is_storage_image && radv_image_has_dcc(iview->image) && - !radv_support_storage_dcc(device->physical_device)) - disable_compression = true; si_set_mutable_tex_desc_fields(device, image, base_level_info, plane_id, iview->base_mip, iview->base_mip, blk_w, is_stencil, is_storage_image, - disable_compression, + is_storage_image || disable_compression, descriptor->plane_descriptors[descriptor_plane_id]); } @@ -1661,8 +1650,7 @@ bool radv_layout_dcc_compressed(const struct radv_device *device, { /* Don't compress compute transfer dst, as image stores are not supported. */ if (layout == VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL && - (queue_mask & (1u << RADV_QUEUE_COMPUTE)) && - !radv_support_storage_dcc(device->physical_device)) + (queue_mask & (1u << RADV_QUEUE_COMPUTE))) return false; return radv_image_has_dcc(image) && layout != VK_IMAGE_LAYOUT_GENERAL; |