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authorGrazvydas Ignotas <[email protected]>2017-08-28 00:29:36 +0300
committerGrazvydas Ignotas <[email protected]>2017-08-31 02:47:26 +0300
commitb8dd69e1b49a5c4c5c82e34f804a97f7448ff6c3 (patch)
tree35d52abe187ae943c66c2dfaeb6f4dd194ceecca /src/amd
parent5610911fed0f03962807ff9eb79d99eb005a5d71 (diff)
radv: don't assert on empty hash table
Currently if table_size is 0, it's falling through to: unreachable("hash table should never be full"); But table_size can be 0 when RADV_DEBUG=nocache is set, or when the table allocation fails (which is not considered an error). Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver" Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd')
-rw-r--r--src/amd/vulkan/radv_pipeline_cache.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/amd/vulkan/radv_pipeline_cache.c b/src/amd/vulkan/radv_pipeline_cache.c
index 99a614dc104..beed35b53a0 100644
--- a/src/amd/vulkan/radv_pipeline_cache.c
+++ b/src/amd/vulkan/radv_pipeline_cache.c
@@ -118,6 +118,9 @@ radv_pipeline_cache_search_unlocked(struct radv_pipeline_cache *cache,
const uint32_t mask = cache->table_size - 1;
const uint32_t start = (*(uint32_t *) sha1);
+ if (cache->table_size == 0)
+ return NULL;
+
for (uint32_t i = 0; i < cache->table_size; i++) {
const uint32_t index = (start + i) & mask;
struct cache_entry *entry = cache->hash_table[index];