diff options
| author | Samuel Pitoiset <[email protected]> | 2019-07-18 15:51:33 +0200 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2019-07-22 09:02:42 +0200 |
| commit | 915abbe932ebe0b5859dc871cb3bac8703b5823c (patch) | |
| tree | b1a6550350d87d89d6084422c7decc2e4c6aa57a /src/amd | |
| parent | d76746c1ffbcb4af1c457a56cda6dd848acebc2e (diff) | |
radv/gfx10: update descriptors for inline uniform blocks
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd')
| -rw-r--r-- | src/amd/vulkan/radv_nir_to_llvm.c | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index fa1413bf8d0..336bae28614 100644 --- a/src/amd/vulkan/radv_nir_to_llvm.c +++ b/src/amd/vulkan/radv_nir_to_llvm.c @@ -1373,9 +1373,16 @@ radv_load_resource(struct ac_shader_abi *abi, LLVMValueRef index, uint32_t desc_type = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) | S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) | S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) | - S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W) | - S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) | - S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32); + S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W); + + if (ctx->ac.chip_class >= GFX10) { + desc_type |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) | + S_008F0C_OOB_SELECT(3) | + S_008F0C_RESOURCE_LEVEL(1); + } else { + desc_type |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) | + S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32); + } LLVMValueRef desc_components[4] = { LLVMBuildPtrToInt(ctx->ac.builder, desc_ptr, ctx->ac.intptr, ""), |